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8
7
See Adaptec* AIC-7902 Design-In Handbook for
up-to-date information regarding implementation of this subsystem
D
C
75,76
CAD NOTE:
Use flood or fat trace
for AGND
B
A
SCSI Controller
8
7
6
AIC-7902
W2
PXAGRND1
PXVCC18
Y2
PXAGRND2
PXAVCC18
V1
PCAGRND1
PXAVCC33_1
V2
PCAGRND2
PXAVCC33_2
AA3
PZGRND
PCAVCC33_1
AB1
PAGUARDG
PCAVCC33_2
PZV33
A13
AGND_0
PAGUARDV
B14
AGND_1
C11
AGND_2
AVCC18_0
C12
AGND_3
AVCC18_1
C13
AGND_4
AVCC18_2
C14
AGND_5
AVCC18_3
C10
AVCC33_4
STAGARDG
D10
AVCC33_3
SRAGARDG
AVCC33_2
AVCC33_1
AVCC33_0
SCSI_AGND
STARGARDV
SRARGARDV
TERMPWRA
TERMPWRB
VIO_0
VIO_1
VIO_2
VIO_3
VIO_4
VIO_5
VIO_6
G23
TEST_4
VIO_7
D11
TEST_5
VIO_8
D13
TEST_6
VIO_9
V3
TEST_7
W3
TEST_8
TEST0
Y3
TEST_9
TEST1
TEST3
U78
6
5
4
SCSI_CORE_VCCA_PX
Place C1333 between
balls Y1 and Y2
75,76
SCSI_AGND
Place C1329, C1330, C1334
P1
betw pin groups (AC1,T2,T3,U1,U2)
Y1
and (V1,V2,W2,AB1)
U1
SCSI_V3_3A_PX
U2
+V3_3
T2
T3
AA2
SCSI_AGND
75,76
AC1
A8
SCSI_CORE_VCCA
Place C1328,C1331 between
B7
pin groups (A8,B7,C7,D7)
C7
and (C13,C14)
D7
SCSI_AGND
75,76
A11
A12
B8
SCSI_V3_3A_0
Place C1327,C1332 between
A9
pin groups (C8,A10,A11,A12)
A10
and (C10,C11,C12)
SCSI_AGND
75,76
C8
D8
SCSI_V3_3A_1
H23
AIC7902_TERMPWRA
D12
AIC7902_TERMPWRB
W5
Y5
AB7
AB8
AB11
AB12
AB15
AB16
AB19
AB20
AB4
AA4
H24
5
4
3
70 OHMS
FB6
+V3_3
70 OHMS
FB9
70 OHMS
FB10
70 OHMS
+V3_3
FB8
70 OHMS
FB7
SCSI_AGND
75,76
R688
LVTRMPWR_A
1K
R689
LVTRMPWR_B
1K
+V3_3
3
3
4
4
5
5
TITLE:
INTEL(R) E7500 CHIPSET CUSTOMER REFERENCE SCHEMATICS
Platform Apps Engineering
R
1900 Prairie City Road
Folsom, California 095630
3
2
1
SCSI_CORE_VCC
74,76
D
C
B
77,78
77,79
A
SHEET
LAST REVISED:
75
03/04/02
2
1
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