Table of Contents
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8
7
FSB_HD[63:0]_N
6,10
FSB_HD63_N
AB6
D63
FSB_HD62_N
Y9
D62
D
FSB_HD61_N
AA8
D61
FSB_HD60_N
AC5
D60
FSB_HD59_N
AC6
D59
FSB_HD58_N
AE7
D58
FSB_HD57_N
AD7
D57
FSB_HD56_N
AC8
D56
FSB_HD55_N
AB10
D55
FSB_HD54_N
AA10
D54
FSB_HD53_N
AA11
D53
FSB_HD52_N
AB13
D52
FSB_HD51_N
AB12
D51
FSB_HD50_N
AC14
D50
FSB_HD49_N
AA14
D49
FSB_HD48_N
AA13
D48
FSB_HD47_N
AC9
D47
FSB_HD46_N
AD8
D46
FSB_HD45_N
AD10
D45
FSB_HD44_N
AE9
D44
FSB_HD43_N
AC11
D43
C
FSB_HD42_N
AE10
D42
FSB_HD41_N
AC12
D41
FSB_HD40_N
AD11
D40
FSB_HD39_N
AD14
D39
FSB_HD38_N
AD13
D38
FSB_HD37_N
AB15
D37
FSB_HD36_N
AD18
D36
FSB_HD35_N
AE13
D35
FSB_HD34_N
AC17
D34
FSB_HD33_N
AA16
D33
FSB_HD32_N
AB16
D32
FSB_HD31_N
AB17
D31
FSB_HD30_N
AD19
D30
FSB_HD29_N
AD21
D29
FSB_HD28_N
AE20
D28
FSB_HD27_N
AE22
D27
FSB_HD26_N
AC21
D26
FSB_HD25_N
AC20
D25
FSB_HD24_N
AA18
D24
FSB_HD23_N
AC23
B
D23
FSB_HD22_N
AE23
D22
FSB_HD21_N
AD24
D21
FSB_HD20_N
AC24
D20
FSB_HD19_N
AE25
D19
FSB_HD18_N
AD25
D18
FSB_HD17_N
AC26
D17
FSB_HD16_N
AE26
D16
FSB_HD15_N
AA19
D15
FSB_HD14_N
AB19
D14
FSB_HD13_N
AB22
D13
FSB_HD12_N
AB20
D12
FSB_HD11_N
AA21
D11
FSB_HD10_N
AA22
D10
FSB_HD9_N
AB23
D9
FSB_HD8_N
AB25
D8
FSB_HD7_N
AB26
D7
FSB_HD6_N
AA24
D6
FSB_HD5_N
Y23
A
D5
FSB_HD4_N
AD27
D4
FSB_HD3_N
AA25
D3
FSB_HD2_N
Y24
D2
FSB_HD1_N
AA27
D1
FSB_HD0_N
Y26
D0
J17
8
7
6
Processor 1 Connector
SOCKET_604
Part 1 of 5
C8
FSB_A35_N
A35
C9
FSB_A34_N
A34
A7
FSB_A33_N
A33
A6
FSB_A32_N
A32
B7
FSB_A31_N
A31
C11
FSB_A30_N
A30
D12
FSB_A29_N
A29
E13
FSB_A28_N
A28
B8
FSB_A27_N
A27
A9
FSB_A26_N
A26
D13
FSB_A25_N
A25
E14
FSB_A24_N
A24
C12
FSB_A23_N
A23
B11
FSB_A22_N
A22
B10
FSB_A21_N
A21
A10
FSB_A20_N
A20
F15
FSB_A19_N
A19
D15
FSB_A18_N
A18
D16
FSB_A17_N
A17
C14
FSB_A16_N
A16
C15
FSB_A15_N
A15
A12
FSB_A14_N
A14
B13
FSB_A13_N
A13
B14
FSB_A12_N
A12
B16
FSB_A11_N
A11
A13
FSB_A10_N
A10
CPU_SMBUS_WP
D17
FSB_A9_N
A9
C17
FSB_A8_N
A8
A19
FSB_A7_N
A7
C18
FSB_A6_N
A6
B18
FSB_A5_N
A5
A20
FSB_A4_N
A4
A22
FSB_A3_N
A3
FSB_HREQ[4:0]_N
B22
FSB_HREQ4_N
RE04
C20
FSB_HREQ3_N
RE03
C21
FSB_HREQ2_N
RE02
B21
FSB_HREQ1_N
RE01
B19
FSB_HREQ0_N
RE00
AB9
FSB_DBI3_N
DBI3
AE12
FSB_DBI2_N
DBI2
AD22
FSB_DBI1_N
DBI1
AC27
FSB_DBI0_N
DBI0
D9
FSB_AP1_N
AP1
E10
FSB_AP0_N
AP0
AE17
FSB_DP3_N
DP3
AC15
FSB_DP2_N
DP2
AE19
FSB_DP1_N
DP1
AC18
FSB_DP0_N
DP0
+VCC_CPU
6
5
4
(Middle processor)
FSB_A[35:3]_N
ITP_TDI_P1
4,9
6,10
FSB_BPRI_N
6,10
R11
ITP_TRST_N
CPU_BREQ2_3_N
4,6,9
6
680
CPU0_BREQ0_N
6,10
FSB_DEFER_N
6,10
FSB_CPURST_N
6,9,10
FSB_RS[2:0]_N
FSB_RS2_N
6,10
FSB_RS1_N
FSB_RS0_N
FSB_RSP_N
6,10
FSB_HTRDY_N
6,10
SMBUS Partition 2
ICH3_A20M_N
6,9,53
CPU0 Thermal Sensor = 32
ICH3_IGNNE_N
6,9,53
CPU0 IDROM = A2
ICH3_INIT_N
6,9,53,66
CPU_LINT1_NMI
6,9,80
ICH3_LINT0_INTR
6,9,53
+V3_3
ICH3_CPUPWRGD
6,53
CPU1_SMI_N
9,80
ICH3_CPUSLP_N
6,9,53
CPU_STPCLK_N
6,9,53
CPU1_BCLK1
65
CPU1_BCLK0
65
ITP_TCK_P
6,9
ITP_TDI_P1
4,9
4,6
ITP_TMS_P
6,9
ITP_TRST_N
4,6,9
CPU1_SM_EP_A2
CPU1_SM_EP_A1
CPU1_SM_EP_A0
CPU1_SM_TS_A1
CPU1_SM_TS_A0
6,10
I2C_BUS2_CLK
6,11,80,81
CPU_SMBUS_WP
4,6
+V3_3
FSB_DBI[3:0]_N
CPU1_VCCA
6,10
4
CPU1_VCCIOPLL
4
CPU1_VID[4:0]
CPU1_VID4
60
CPU1_VID3
CPU1_VID2
CPU1_VID1
CPU1_VID0
6,10
CPU1_VSSA
6,10
4
FSB_DP[3:0]_N
6,10
CPU1_VCCA
4
CAD NOTE:
Caps close to pins
33UF
L3
AB4, AD4, AA5
1
2
4.7UH
CPU1_VSSA
4
L4
1
2
33UF
4.7UH
CPU1_VCCIOPLL
4
5
4
3
2
+VCC_CPU
+VCC_CPU
SOCKET_604
Part 2 of 5
D23
BPRI
IERR
D10
BR3
ADS
E11
BR2
BINIT
F12
BR1
BNR
C23
DEFER
BPM5
Y8
RESET
BPM4
F21
RS2
BPM3
D22
RS1
BPM2
E21
RS0
BPM1
C6
RSP
BPM0
E19
TRDY
BR0
DBSY
F27
A20M
DRDY
C26
IGGNE
HIT
D6
INIT
HITM
G23
LINT1
LOCK
B24
LINT0
MCERR
AB7
PWRGOOD
ADSTB1
C27
SMI
ADSTB0
AE6
SLP
DSTBP3
D4
STPCLK
DSTBP2
W5
BCLK1
DSTBP1
Y4
BCLK0
DSTBP0
E24
TCK
DSTBN3
C24
TDI
DSTBN2
A25
TMS
DSTBN1
F24
TRST
DSTBN0
AB28
SM_EP_A2
AB29
SM_EP_A1
AA29
SM_EP_A0
FERR
Y29
THERMTRIP
SM_TS_A1
AA28
SM_TS_A0
PROCHOT
AC28
SM_CLK
TD0
AD29
AC29
SM_WP
SM_DAT
AD28
SM_ALERT
AE29
SM_VCC1
COMP1
AE28
AD16
SM_VCC0
COMP0
AB4
VCCA
GTLREF3
AD4
VCCIOPLL
GTLREF2
B27
VCCSENSE
GTLREF1
B3
W23
VID4
GTLREF0
C3
VID3
ODTEN
D3
VID2
SKTOCC
E3
VID1
TESTHI6
F3
VID0
TESTHI5
AA5
VSSA
TESTHI4
D26
VSSSENSE
TESTHI3
TESTHI2
TESTHI1
TESTHI0
J17
Caps close to pins
CPU_BPM5_N
F9, W9, F23, W23
4,6,9
4,9
CPU1_GTL_VREF2
CPU_BPM4_N
4,6,9
CPU1_GTL_VREF1
CPU_BPM3_N
4,6,9
4,9
4,6,9
CPU_BPM2_N
4,6,9
CPU_BPM1_N
4,6,9
CPU_BPM0_N
TITLE:
INTEL(R) E7500 CHIPSET CUSTOMER REFERENCE SCHEMATICS
Platform Apps Engineering
R
1900 Prairie City Road
Folsom, California 095630
3
2
1
D
E5
CPU1_IERR_N
D19
FSB_ADS_N
6,10
F11
FSB_BINIT_N
6,10
F20
FSB_BNR_N
6,10
E4
CPU_BPM5_N
4,6,9
E8
CPU_BPM4_N
4,6,9
F5
CPU_BPM3_N
4,6,9
E7
CPU_BPM2_N
4,6,9
F8
CPU_BPM1_N
4,6,9
F6
CPU_BPM0_N
4,6,9
D20
CPU1_BREQ0_N
6
F18
FSB_DBSY_N
6,10
E18
FSB_DRDY_N
6,10
E22
FSB_HIT_N
6,10
A23
FSB_HITM_N
6,10
A17
FSB_HLOCK_N
6,10
D7
FSB_BERR_N
6,10
F14
FSB_ADSTB1_N
6,10
F17
FSB_ADSTB0_N
FSB_ADSTB[1:0]_N
Y11
FSB_DSTBP3_N
6,10
C
Y14
FSB_DSTBP2_N
FSB_DSTBP[3:0]_N
Y17
FSB_DSTBP1_N
Y20
FSB_DSTBP0_N
Y12
FSB_DSTBN3_N
6,10
Y15
FSB_DSTBN2_N
FSB_DSTBN[3:0]_N
Y18
FSB_DSTBN1_N
Y21
FSB_DSTBN0_N
E27
CPU_FERR_N
6,53
F26
CPU_THRM_TRIP_N
6,7
B25
CPU_PROC_HOT_N
6,80
E25
ITP_TDO_P1
9
I2C_BUS2_DAT
6,11,80,81
CPU_SMBALERT_N
6
R5
E16
CPU1_COMP1
49.9
1%
R6
CPU1_COMP0
49.9
1%
B
F9
CPU1_GTL_VREF2
4,9
+V3_3
F23
W9
CPU1_GTL_VREF1
4,9
51
B5
CPU1_ODTEN
R29
A3
CPU1_SKTOCC_N
7,80
R7
51
AE5
CPU1_TESTHI6
51
R22
AD5
CPU1_TESTHI5
51
R23
AA7
CPU1_TESTHI4
51
R24
Y6
CPU1_TESTHI3
51
R25
W8
CPU1_TESTHI2
+VCC_CPU
51
R26
W7
CPU1_TESTHI1
51
R27
W6
CPU1_TESTHI0
Place BPM termination
resistors at ends of traces.
A
SHEET
LAST REVISED:
4
03/04/02
1
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