Intel ® Ich3-S Power Rails; Intel ® Ich3-S Decoupling Recommendations; Example 3.3 V/V5Ref Sequencing Circuitry; Ich3-S Power Rail Terminology - Intel Xeon Design Manual

Processor with 512 kb l2 cache and intel e7500 chipset platform
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Figure 12-22. Example 3.3 V/V5REF Sequencing Circuitry
®
12.4.3
Intel
The ICH3-S refers to it's standby rails as suspend.
Table 12-8. ICH3-S Power Rail Terminology
Platform Terminology
5 V Standby
3.3 V Standby
1.8 V Standby
®
12.4.4
Intel
The ICH3-S is capable of generating large current swings when switching between logic high and
logic low. This condition could cause the component voltage rails to drop below specified limits.
To avoid this, ensure that the appropriate amount of bulk capacitance is added in parallel to the
voltage input pins. It is recommended that the developer use the decoupling capacitors specified in
Table 12-9
placed as close to the package as possible (200 mils nominal). It is recommended that for prototype
board designs, the designer include pads for extra power plane decoupling capacitors.
Design Guide
VCC Supply
(3.3 V)
VREF
To System
ICH3-S Power Rails
ICH3-S Terminology
ICH3-S Decoupling Recommendations
to ensure that the component maintains stable supply voltages. The capacitors should be
Platform Power Delivery Guidelines
5 V Supply
1 kΩ
1 µF
To System
Table 12-8
5 V Suspend
3.3 V Suspend
1.8 V Suspend
lists the nomenclature.
183

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