Intel Xeon Design Manual page 255

8 7
D
C
B
P64H2_2_PB_GNT4_N
32
P64H2_2_PB_GNT5_N
32
P64H2_2_PA_GNT4_N
31
P64H2_2_PA_GNT5_N
31
A
8 7
6
80
29,42,44,45,80,81
29,42,44,45,80,81
+V3_3
R262
8.2K
HPA_SLOT[2:0] = 000b ==> No hot-plug slots
P64H2 SMBus Address Strapping
Bit Value
7 1
6 1
5 PA_GNT5_RESETA_N
4 0
3 PA_GNT4_BUSENB_N
2 PB_GNT5_RESETA_N
1 PB_GNT4_BUSENB_N
P64H2 #2 SMBus Address = C0h
6
5 4
P64H2 #2
+V5_0
+V3_3
AD24 VCC5REF1
G1 VCC5REF2
P64H2_2_CLK66 H7 CLK66
65
P64H2_2_TEST_N B17 TEST_N
SYS_PWROK_2 E21 PWR_OK
29,55,64
P64H2_2_TP0 F17 TP0
PCIRST_2_N E20 RSTIN_N
29,52,53
E19 BPCLK100
E18 BPCLK133
P64H2_2_RASERR_N D17 RASERR_N
I2C_BUS1_CLK C18 SCLK
I2C_BUS1_DAT D18 SDATA
P64H2_2_CK200_N F7 CK200_N
P64H2_2_CK200 G6 CK200
ICH3_PIRQB_N C4 BTINTR_N
53,57
P64H2_2_APICCLK A3 APIC_CLK
R263
P64H2_2_APICD1 B4 APICD1
8.2K R264
P64H2_2_APICD0 A4 APICD0
8.2K
A18 HPA_SORR_N
B18 HPA_SOR_N_RESETB_N
C19 HPA_SOLR_PWRENB
D19 HPA_SOL_AMLEDA
B19 HPA_SOD_PWRENA
A19 HPA_SOC_GNLEDA
P64H2_2_HPA_SLOT0 A20 HPA_SLOT0_PCIXCAP2B
P64H2_2_HPA_SLOT1 C20 HPA_SLOT1_PCIXCAP2A
P64H2_2_HPA_SLOT2 D20 HPA_SLOT2_PCIXCAP1A
C21 HPA_SIL_N_CLKENA
+V3_3
R1043
P64H2_2_HA_AMLEDB D21 HPA_SID_AMLEDB
8.2K B21 HPA_SIC_GNLEDB
U15
5 4
3 2
P64H2
HI_VSWING G10 P64H2_2_VSWING
HI_VREF F11 P64H2_2_VREF
HI_RCOMP F9 P64H2_2_RCOMP
PUSTRBS C14 P64H2_2_PUSTRBS
PUSTRBF E14 P64H2_2_PUSTRBF
PSTRBS A10 P64H2_2_PSTRBS
PSTRBF C10 P64H2_2_PSTRBF
HI0 A8 P64H2_2_HI0
HI1 C8 P64H2_2_HI1
HI2 E8 P64H2_2_HI2
HI3 B9 P64H2_2_HI3
HI4 D9 P64H2_2_HI4
HI5 E10 P64H2_2_HI5
HI6 B11 P64H2_2_HI6
HI7 D11 P64H2_2_HI7
HI8 E12 P64H2_2_HI8
HI9 B13 P64H2_2_HI9
HI10 D13 P64H2_2_HI10
HI11 A14 P64H2_2_HI11
HI12 B15 P64H2_2_HI12
HI13 D15 P64H2_2_HI13
HI14 A16 P64H2_2_HI14
HI15 C16 P64H2_2_HI15
G11
HI16 P64H2_2_HI16
HI17 G13 P64H2_2_HI17
HI18 G12 P64H2_2_HI18
HI19 G8
HI20 C12 P64H2_2_HI20
HI21 E16 P64H2_2_HI21
HPB_SORR_N A22 P64H2_2_HPB_SORR_N
HPB_SOR_N_RESETB_N A21 P64H2_2_HPB_SOR_N
HPB_SOLR_PWRENB B22 P64H2_2_HPB_SOLR
HPB_SOL_AMLEDA C22 P64H2_2_HPB_SOL
HPB_SOD_PWRENA C24 P64H2_2_HPB_SOD
HPB_SOC_GNLEDA A24 P64H2_2_HPB_SOC
HPB_SLOT0_PCIXCAP2B B23 P64H2_2_HPB_SLOT0
HPB_SLOT1_PCIXCAP2A C23 P64H2_2_HPB_SLOT1
HPB_SLOT2_PCIXCAP1A D23 P64H2_2_HPB_SLOT2
HPB_SIL_N_CLKENA D24 P64H2_2_HPB_SIL_N
HPB_SID_AMLEDB B24 P64H2_2_HPB_SID
HPB_SIC_GNLEDB A23 P64H2_2_HPB_SIC
HPB_SLOT[2:0] = 100b ==> Four hot-plug slots
TITLE:
INTEL(R) E7500 CHIPSET CUSTOMER REFERENCE SCHEMATICS
Platform Apps Engineering
R
1900 Prairie City Road
Folsom, California 095630
3 2
1
+V1_8
D
+V1_8
11
11
11
11
11
P64H2_2_HI[15:0]
C
11
11
11
11
B
11
38
+V3_3
38
38
38
38
38
38
38
38
A
SHEET
LAST REVISED: 33
03/04/02
1