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8
7
D
C
51
+V12
52
51
52
38
B
+V3_3
+V3_3
SLOT_D_HI_PRES_N
52
14
9
U72
11
10
10
SLOT_D_PWREN
SLOT_D_PWREN_N
38
7
74LVC14
A
PS_PWRGD_SLOT
64
For Test Only
8
7
6
-V12
15
M12VIN_1
13
SLOT_C_M12V_G
M12VG_1
14
M12VO_1
SLOT_C_M12V
28
M12VIN_2
2
SLOT_D_M12V_G
M12VG_2
1
M12VO_2
SLOT_D_M12V
21
12VIN_1
9
SLOT_C_12V_G
12VG_1
8
12VO_1
SLOT_C_12V
22
12VIN_2
6
SLOT_D_12V_G
12VG_2
7
12VO_2
SLOT_D_12V
12
PWRON_1
3
PWRON_2
SLOT_C_PWREN
U20
U57
14
+VSBY3_3
8
SLOT_D_ON
7
74LVC00
U82
14
1
3
SLOT_D_PWR_ON
2
7
74LVC08
PCI Hot Plug power control. 66MHz Slots C and D
6
5
4
Route as diff pair
18
5VISEN_1
19
5VS_1
20
SLOTC_3_5V_G
3V5VG_1
HIP1011D
23
SLOTD_3_5V_G
3V5VG_2
24
5VS_2
25
5VISEN_2
16
3VISEN_1
17
3VS_1
26
3VS_2
27
3VISEN_2
SLOT_D_FAULT_N
38
SLOT_C_FAULT_N
38
5
4
3
SLOT_C_5V
SLOT_C_5V
51
SLOT_C_5V_S
3
2
1
Q18
S
4
G
D
+V5_0
5
6
7
8
5
6
7
8
Q17
D
G
4
S
3
2
1
R327
SLOT_D_5V_S
SLOT_D_5V
SLOT_D_5V
0.005
Route as diff pairs
SLOT_C_3V
SLOT_C_3V
R328
SLOT_C_3V_S
0.005
3
2
1
Q19
S
4
G
D
+V3_3
5
6
7
8
5
6
7
8
Q16
D
G
4
S
3
2
1
R324
SLOT_D_3V_S
SLOT_D_3V
SLOT_D_3V
0.005
Route as diff pair
TITLE:
INTEL(R) E7500 CHIPSET CUSTOMER REFERENCE SCHEMATICS
Platform Apps Engineering
R
1900 Prairie City Road
Folsom, California 095630
3
2
1
D
C
52
45,51
B
46,52
A
SHEET
LAST REVISED:
41
03/04/02
2
1
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