Intel Xeon Design Manual page 144

I/O Controller Hub
Distance from Magnetics Module to RJ45 (Distance A)
The distance A in
between the magnetics module and the RJ45 connector should be kept to less than one inch of
separation. The following trace characteristics are important and should be observed:
Differential Impedance: The differential impedance should be 100 Ω. The single ended trace
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impedance will be approximately 50 Ω; however, the differential impedance can also be
affected by the spacing between the traces.
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Trace Symmetry: Differential pairs (such as TDP and TDN) should be routed with consistent
separation, and with exactly the same lengths and physical dimensions (for example, width).
Warning: Asymmetric and unequal length traces in the differential pairs contribute to common mode noise.
This can degrade the receive circuit's performance and contribute to radiated emissions from the
transmit circuit. If the 82562ET must be placed further than a couple of inches from the RJ45
connector, distance B can be sacrificed. Keeping the total distance between the 82562ET and RJ45
as short as possible should be a priority.
Note: Measured trace impedance for layout designs targeting 100 Ω often results in lower actual
impedance. OEMs should verify actual trace impedance and adjust their layout accordingly. If the
actual impedance is consistently low, a target of 105 Ω –110 Ω should compensate for second order
effects.
Distance from 82562ET to Magnetics Module (Distance B)
Distance B should also be designed to be less than one inch between devices. The high-speed
nature of the signals propagating through these traces requires that the distance between these
components be closely observed. In general, any section of traces that is intended for use with
high-speed signals should observe proper termination practices. Proper termination of signals can
reduce reflections caused by impedance mismatches between device and traces. The reflections of
a signal may have a high-frequency component that may contribute more EMI than the original
signal itself. For this reason, these traces should be designed to a 100 Ω differential value. These
traces should also be symmetric and equal length within each differential pair.
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Figure 9-20 should be given the highest priority in board layout. The distance
Design Guide