Hardware Characteristics; Implementation Dependency Categories; List Of Implementation Dependencies - Fujitsu SPARC JPS1 Implementation Supplement Manual

C.2

Hardware Characteristics

Please refer to Section C.2 of Commonality.
C.3

Implementation Dependency Categories

Please refer to Section C.3 of Commonality.
C.4

List of Implementation Dependencies

TABLE C-1
treated in the
TABLE C-1
Nbr
1
2
3
4–5
6
7
8
70 SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V • Release 1.0, 1 July 2002
provides a complete list of how each implementation dependency is
implementation.
SPARC64 V
SPARC64 V Implementation Dependencies (1 of 11)
SPARC64 V Implementation Notes
Software emulation of instructions
The operating system emulates all instructions that generate
or
illegal_instruction unimplemented_FPop
Number of IU registers
SPARC64 V
supports eight register windows (NWINDOWS = 8).
SPARC64 V supports an additional two global register sets (Interrupt
globals and MMU globals) for a total of 160 integer registers.
Incorrect IEEE Std 754-1985 results
See Section B.6, Floating-Point Nonstandard Mode, on page 61 for details.
Reserved.
I/O registers privileged status
This dependency is beyond the scope of this publication. It should be
defined in each system that uses
I/O register definitions
This dependency is beyond the scope of this publication. It should be
defined in each system that uses
RDASR/WRASR target registers
See A.50 and A.70 in Commonality for details of implementation-dependent
RDASR/WRASR instructions.
exceptions.
SPARC64 V
.
SPARC64 V
.
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