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UPA Config Register Description (Continued)
TABLE R-3
Bits
Field
58:57
WRI_S
56:55
INT_S
54:46
—
45:43
UC_S
42:41
—
40:39
AM
38:35
MCAP
34
—
33:30
CLK_MODE
216
SPARC JPS1 Implementation Supplement: Fujitsu SPARC64 V • Release 1.0, 1 July 2002
Description
Specify the size of maximum outstanding WRI packet as follows.
00
:
1
2
01
:
2
2
10
:
4
2
11
:
8
2
Specify the size of maximum outstanding INT packet as follows.
00
:
1
2
01
:
8
2
10
– 11
:
8, but should not be specified for the extension.
2
2
Reserved. Read as 0.
U2 cache size:
010
:
2 MB
2
Reserved. Read as 0.
Address Mode. Specifies the physical address size of UPA address field.
00
:
41 bits
2
01
:
43 bits
2
10
– 11
:
Reserved
2
2
The value set by OPSR is indicated. Consult the system document for the meaning and
encoding of this field.
Reserved. Read as 0.
Specify the ratio between CPU clock and UPA' clock.
0000
– 0011
: Reserved
2
2
0100
:
4:1
2
0101
:
5:1
2
0110
:
6:1
2
0111
:
7:1
2
1000
:
8:1
2
1001
:
9:1
2
1010
:
10:1
2
1011
:
11:1
2
1100
:
12:1
2
1101
:
13:1
2
1110
:
14:1
2
1111
:
15:1
2
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