Asi_Async_Fault_Addr_D1 - Fujitsu SPARC JPS1 Implementation Supplement Manual

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P.7.2

ASI_ASYNC_FAULT_ADDR_D1

[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
TABLE P-16
ASI_ASYNC_FAULT_ADDR_D1
TABLE P-16
Bit
Name
63:56
CONTENTS
55
WAY
50:48
VA_BIT15_13
42:6
PA_BIT42_6
Others Reserved
All
Release 1.0, 1 July 2002
Register name:
ASI:
VA:
Error checking:
Format & function:
Initial value at reset:
Update:
Software access
describes the fields of the ASI_ASYNC_FAULT_ADDR_D1 register.
R/W
Description
R
Contents of ASI_AFAR_D1. This field has the following two functions:
• Indicates the type of error held in the other fields of ASI_AFAR_D1 as
defined in
TABLE P-15
• Controls the recording of newly detected restrainable errors. Upon
detection of a new restrainable error recordable in ASI_AFAR_D1, if the
current ASI_AFAR_D1.CONTENTS < the AFSR
error, the new error is recorded into ASI_AFAR_D1. If the current
ASI_AFAR_D1.CONTENTS
error is not recorded into ASI_AFAR_D1 and ASI_AFAR_D1 is unchanged.
R
D1 cache way with the error. Indicates the D1 cache way number (0 or 1) in
which the error is detected.
I
R
ndicates the virtual address bits 15:13 contained in the D1 cache index of the
cache line that caused the error. Because the D1 cache is a VIPT cache, the D1
cache index contains the virtual address bits 15:13.
R
Indicates the physical address bits 42:6 for the D1 cache line that caused the
error.
R
Always reads as 0.
W
Any write access sets all fields in this register to 0. That is, when a program
writes to ASI_AFAR_D1, the entire ASI_AFAR_D1 is set to 0 regardless of the
write value; the error in ASI_AFAR_D1 is expunged.
ASI_ASYNC_FAULT_ADDR_D1 (ASI_AFAR_D1)
4D
16
00
16
Parity
See
TABLE P-16
.
Hard POR: All fields in ASI_AFAR_D1 are set to 0.
Other reset: Value in ASI_AFAR_D1 is unchanged.
When a new restrainable error is detected, ASI_AFAR_D1 is
updated as defined in Section P.7.1 in the notes on the AFSR
Prio_D1 column of
When program writes to ASI_AFAR_D1, all fields in
ASI_AFAR_D1 are set to 0 and validated.
ldxa [%g0]ASI_AFAR_D1,%rN
stxa %g0, [%g0]ASI_AFAR_D1
(
) Bit Description
ASI_AFAR_D1
.
the AFSR
.
TABLE P-15
value of the new
Prio_D1
value of the new error, the
Prio_D1
F. Chapter P
Error Handling
177

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