Chapter 1: VC707 Evaluation Board Features
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8
Send Feedback
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Ethernet PHY SGMII interface (RJ-45 connector)
PCI Express endpoint connectivity
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Gen1 8-lane (x8)
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Gen2 8-lane (x8)
SFP+ Connector
10/100/1000 tri-speed Ethernet PHY
USB-to-UART bridge
HDMI™ codec
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C bus
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C MUX
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C EEPROM (1 KB)
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USER I
C programmable LVDS oscillator
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DDR3 SODIMM socket
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HDMI codec
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FMC1 HPC connector
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FMC2 HPC connector
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SFP+ connector
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C programmable jitter-attenuating precision clock multiplier
Status LEDs
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Ethernet status
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Power good
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FPGA INIT
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FPGA DONE
User I/O
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User LEDs (eight GPIO)
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User pushbuttons (five directional)
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CPU reset pushbutton
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User DIP switch (8-pole GPIO)
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User SMA GPIO connectors (one pair)
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LCD character display (16 characters x 2 lines)
Switches
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Power on/off slide switch
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FPGA_PROB_B pushbutton
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Configuration mode DIP switch
VITA 57.1 FMC1 HPC Connector
VITA 57.1 FMC2 HPC Connector
Power management
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PMBus voltage and current monitoring through TI power controller
XADC header
Configuration options
www.xilinx.com
VC707 Evaluation Board
UG885 (v1.4) May 12, 2014
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