Xilinx VC707 User Manual page 103

VC707 Evaluation Board
UG885 (v1.4) May 12, 2014
set_property PACKAGE_PIN AK32 [get_ports USER_SMA_CLOCK_N]
set_property IOSTANDARD LVCMOS18 [get_ports USER_SMA_CLOCK_N]
set_property PACKAGE_PIN AK34 [get_ports USER_CLOCK_P]
set_property IOSTANDARD LVDS [get_ports USER_CLOCK_P]
set_property PACKAGE_PIN AL34 [get_ports USER_CLOCK_N]
set_property IOSTANDARD LVDS [get_ports USER_CLOCK_N]
#FAN
set_property PACKAGE_PIN BA37 [get_ports SM_FAN_PWM]
set_property IOSTANDARD LVCMOS18 [get_ports SM_FAN_PWM]
set_property PACKAGE_PIN BB37 [get_ports SM_FAN_TACH]
set_property IOSTANDARD LVCMOS18 [get_ports SM_FAN_TACH]
#SWITCHES
set_property PACKAGE_PIN AV30 [get_ports GPIO_DIP_SW0]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW0]
set_property PACKAGE_PIN AY33 [get_ports GPIO_DIP_SW1]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW1]
set_property PACKAGE_PIN BA31 [get_ports GPIO_DIP_SW2]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW2]
set_property PACKAGE_PIN BA32 [get_ports GPIO_DIP_SW3]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW3]
set_property PACKAGE_PIN AW30 [get_ports GPIO_DIP_SW4]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW4]
set_property PACKAGE_PIN AY30 [get_ports GPIO_DIP_SW5]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW5]
set_property PACKAGE_PIN BA30 [get_ports GPIO_DIP_SW6]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW6]
set_property PACKAGE_PIN BB31 [get_ports GPIO_DIP_SW7]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_DIP_SW7]
#PUSH BUTTONS
set_property PACKAGE_PIN AV40 [get_ports CPU_RESET]
set_property IOSTANDARD LVCMOS18 [get_ports CPU_RESET]
set_property PACKAGE_PIN AP40 [get_ports GPIO_SW_S]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_SW_S]
set_property PACKAGE_PIN AR40 [get_ports GPIO_SW_N]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_SW_N]
set_property PACKAGE_PIN AV39 [get_ports GPIO_SW_C]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_SW_C]
set_property PACKAGE_PIN AU38 [get_ports GPIO_SW_E]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_SW_E]
set_property PACKAGE_PIN AW40 [get_ports GPIO_SW_W]
set_property IOSTANDARD LVCMOS18 [get_ports GPIO_SW_W]
#XADC
set_property PACKAGE_PIN AN38 [get_ports XADC_VAUX0P_R]
set_property IOSTANDARD LVCMOS18 [get_ports XADC_VAUX0P_R]
set_property PACKAGE_PIN AP38 [get_ports XADC_VAUX0N_R]
set_property IOSTANDARD LVCMOS18 [get_ports XADC_VAUX0N_R]
set_property PACKAGE_PIN AM41 [get_ports XADC_VAUX8P_R]
set_property IOSTANDARD LVCMOS18 [get_ports XADC_VAUX8P_R]
set_property PACKAGE_PIN AM42 [get_ports XADC_VAUX8N_R]
set_property IOSTANDARD LVCMOS18 [get_ports XADC_VAUX8N_R]
set_property PACKAGE_PIN BA21 [get_ports XADC_GPIO_0]
set_property IOSTANDARD LVCMOS18 [get_ports XADC_GPIO_0]
set_property PACKAGE_PIN BB21 [get_ports XADC_GPIO_1]
set_property IOSTANDARD LVCMOS18 [get_ports XADC_GPIO_1]
set_property PACKAGE_PIN BB24 [get_ports XADC_GPIO_2]
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VC707 Board XDC Listing
103
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