Xilinx VC707 User Manual page 20

Chapter 1: VC707 Evaluation Board Features
Table 1-5: BPI Flash Memory Connections to the FPGA (Cont'd)
Additional FPGA bitstreams can be stored and used for configuration by setting the Warm
Boot Start Address (WBSTAR) register contained in 7 series FPGAs. More information is
available in the reconfiguration and multiboot section in 7 Series FPGAs Configuration
User Guide (UG470)
The configuration section of 7 Series FPGAs Configuration User Guide (UG470)
provides details on the Master BPI configuration mode.
Figure 1-4
more details, see the Micron PC28F00AG18FE data sheet
20
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FPGA (U1) Pin Net Name
AM37 FLASH_D8
AG33 FLASH_D9
AH33 FLASH_D10
AK35 FLASH_D11
AL35 FLASH_D12
AJ31 FLASH_D13
AH34 FLASH_D14
AJ35 FLASH_D15
AM34 FLASH_WAIT
BB41 FPGA_FWE_B
BA41 FLASH_OE_B
N10 FPGA_CCLK
AL36 FLASH_CE_B
AY37 FLASH_ADV_B
AG11 FPGA_INIT_B
[Ref 2].
shows the connections of the linear BPI Flash memory on the VC707 board. For
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BPI Flash Memory (U3)
Pin Number Pin Name
E1 DQ8
E3 DQ9
F3 DQ10
F4 DQ11
F5 DQ12
H5 DQ13
G7 DQ14
E7 DQ15
F7 WAIT
G8 WE_B
F8 OE_B
E6 CLK
B4 CE_B
F6 ADV_B
D4 RST_B
[Ref 16].
UG885 (v1.4) May 12, 2014
[Ref 2]
VC707 Evaluation Board