Xilinx VC707 User Manual page 49

For the virtex-7 fpga
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The VC707 board I
X-Ref Target - Figure 1-22
User applications that communicate with devices on one of the downstream I
must first set up a path to the desired bus through the U52 bus switch at I
(0b01110100).
Table 1-24: I
PCA9548
USER_CLK_SDL/SCL
FMC1_HPC_IIC_SDA/SCL
FMC2_HPC_IIC_SDA/SCL
EEPROM_IIC_SDA/SCL
SFP_IIC_SDA/SCL
IIC_SDA/SCL_HDMI
IIC_SDA/SCL_DDR3
Si5324_SDA/SCL
Notes:
1. Use the PCA9458 (U52) at I
Information about the PCA9548 is available on the TI Semiconductor website
VC707 Evaluation Board
UG885 (v1.4) May 12, 2014
2
C bus topology is shown in
U1
FPGA
Bank 15
(2.5V)
IIC_SDA/SCL_MAIN
Figure 1-22: I
Table 1-24
lists the address for each bus.
2
C Bus Addresses
2
I
C Bus
2
C address 0x74 (0b01110100) to setup the path to these buses.
www.xilinx.com
Figure
1-22.
U52
PCA9548
1 2 C 1-to-8
Bus Switch
CH0 - USER_CLK_SDL/SCL
CH1 - FMC1_HPC_IIC_SDA/SCL
CH2 - FMC2_HPC_IIC_SDA/SCL
CH3 - EEPROM_IIC_SDA/SCL
CH4 - SFP_IIC_SDA/SCL
CH5 - IIC_SDA/SCL_HDMI
CH6 - IIC_SDA/SCL_DDR3
CH7 - SI5324_SDA/SCL
2
C Bus Topology
2
I
C Switch
2
I
C Address
Position
NA
0b1110100
0
0b1110000
1
0bXXXXX00
2
0bXXXXX00
3
0b1010100
4
0b1010000
5
0b0111001
6
0b1010000, 0b0011000
7
0b1010000
Feature Descriptions
UG855_C1_22_021012
2
C buses
2
C address 0x74
[Ref
24].
49
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