Xilinx VC707 User Manual page 27

For the virtex-7 fpga
Hide thumbs Also See for VC707:
Table of Contents

Advertisement

The JTAG circuit details are shown in
X-Ref Target - Figure 1-8
VCC3V3
U26
Digilent
USB-JTAG
Module
R95 15Ω
TDI
R96 15Ω
TMS
R94 15Ω
TCK
TDO
VCC3V3
J4
JTAG
Header
JTAG_TDI
TDI
JTAG_TMS
TMS
JTAG_TCK
TCK
JTAG_TDO_LS
TDO
VC707 Evaluation Board
UG885 (v1.4) May 12, 2014
U5
VCC3V3
SN74LV541A
Voltage
Translator
U19
SN74LV541A
Voltage
Translator
VCC3V3
VCC3V3
VCC1V8
U7
SN74AVC2T45
Voltage
Translator
Figure 1-8: JTAG Circuit
www.xilinx.com
Figure
1-8.
FMC1_HPC_PRSNT_M2C_B
U27
FMC1_TDO_FMC2_TDI
FMC1_HPC_TMS_BUF
FMC1_HPC_TCK_BUF
FMC2_HPC_PRSNT_M2C_B
U28
FMC2_HPC_TMS_BUF
FMC2_HPC_TCK_BUF
VCC3V3
VCC1V8
U32
TXS0108E
Voltage
Translator
FMC2_PRSNT_M2C_B_LS
FMC1_PRSNT_M2C_B_LS
VCC3V3
VCC1V8
U46
SN74AVC1T45
Voltage
Translator
FPGA_TDI_BUF
FPGA_TMS_BUF
FPGA_TCK_BUF
VCC1V8
VCC3V3
U72
SN74AVC1T45
Voltage
Translator
Feature Descriptions
J35
FMC1 HPC
Connector
PRSNT_L
FMC_TDI_BUF
TDI
TDO
TMS
TCK
J37
FMC2 HPC
Connector
PRSNT_L
TDI
FMC_HPC_TDO
TDO
TMS
TCK
U1
Virtex-7
FPGA
Bank 14
AG32
AM31
Bank 0
TDI
TMS
TCK
JTAG_TDO
TDO
UG855_c1_08_021412
27
Send Feedback

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents