Xilinx VC707 User Manual page 54

Chapter 1: VC707 Evaluation Board Features
User SMA
Figure 1-28
X-Ref Target - Figure 1-28
Table 1-26
Table 1-26: GPIO Connections to FPGA U1
FPGA (U1) Pin
Indicator LEDs (Active-High)
AM39
AN39
AR37
AT37
AR35
AP41
AP42
AU39
CPU Reset Pushbutton Switch
AV40
Directional Pushbutton Switches
AR40
AU38
AP40
54
Send Feedback
shows the user SMA circuit.
J33
SMA
Connector
GND
J34
SMA
Connector
GND
Figure 1-28: User SMA
lists the GPIO Connections to FPGA U1.
Schematic Net Name
GPIO_LED_0
GPIO_LED_1
GPIO_LED_2
GPIO_LED_3
GPIO_LED_4
GPIO_LED_5
GPIO_LED_6
GPIO_LED_7
CPU_RESET
GPIO_SW_N
GPIO_SW_E
GPIO_SW_S
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USER SMA GPIO P
USER SMA GPIO N
UG885_c1_126_012413
GPIO Pin
DS2.2
DS3.2
DS4.2
DS5.2
DS6.2
DS7.2
DS8.2
DS9.2
SW3.3
SW3.3
SW4.3
SW5.3
VC707 Evaluation Board
UG885 (v1.4) May 12, 2014