Link Refresh Time - Mitsubishi Electric MELSEC Q Series Reference Manual

Cc-link ie controller network
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7.2

Link Refresh Time

The following are calculation formulas for the link refresh time (increase in END processing time of the CPU module).
(1) For Basic model QCPUs, High Performance model QCPUs, Process CPUs,
Redundant CPUs, and Universal model QCPUs)
KM1 KM2
KM3
T:
Link refresh time on sending side
R: Link refresh time on receiving side
LB:
Total number of actual link refresh points in LB
LW: Total number of actual link refresh points in LW
LX:
Total number of actual link refresh points in LX
LY:
Total number of actual link refresh points in LY
SB:
SB points
SW: SW points
E:
Transfer time of file register (R, ZR), extended data register (D), or extended link register (W) on memory
card
L:
Interlink transmission time (
KM1, KM2, and KM3: Constant
*1
Total number of link device points for the range set by refresh parameters and set in the network range assignment. Note
that the points assigned to reserved stations are excluded.
Remark
• Add
the data to the standard RAM and extended SRAM cassette file registers.
• Add
LB LX LY SB
16
LB LX LY
[ms]
LW
16
Page 247, Section 7.2.1)
E only when refreshing the data to the memory card file register. Addition is not required when refreshing
L only when using the interlink transmission.
LW SW
[ms]
*1
*1
*1
*1
CHAPTER 7 PROCESSING TIME
245
7

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