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6.3 16-Bit Timer/Event Counter Configuration
16-bit timer/event counter consists of the following hardware.
Timer register
Register
Timer output
Control register
Note See Block Diagram of Figure 4-3 P20 to P27.
(1) 16-bit timer/counter 0 (TM0)
TM0 is a 16-bit read-only register that counts count pulses.
The counter is incremented in synchronization with the rising edge of an input clock. If the count value is read
during operation, input of the count clock is temporarily stopped, and the count value at that point is read.
The count value is reset to 0000H in the following cases:
<1> At RESET input
<2> If TMC03 and TMC02 are cleared
<3> If valid edge of TI00 is input in the clear & start mode by inputting valid edge of TI00
<4> If TM0 and CR00 coincide with each other in the clear & start mode on coincidence between TM0 and CR00
<5> OSPT is set in the one-shot pulse output mode
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CHAPTER 6 16-BIT TIMER/EVENT COUNTER
Table 6-2. 16-Bit Timer/Event Counter Configuration
Item
16 bits × 1 (TM0)
Capture/compare register: 16 bits × 2 (CR00, CR01)
1 (TO0)
16-bit timer mode control register 0 (TMC0)
Capture/compare control register 0 (CRC0)
16-bit timer output control register 0 (TOC0)
Prescaler mode register 0 (PRM0)
Port mode register 2 (PM2)
Preliminary User's Manual U13420EJ2V0UM00
Configuration
Note
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