Avaya S8700 Maintenance Manual page 191

DS1 CPE Loopback Jack (T1 Only)
Table 5-1. DS1 Span Troubleshooting
Displayed Field Function
Test: Pattern 3-in-24
cpe-loopback-jack
Synchronized Y or N
Bit Error Count Cumulative
count of
detected errors
9. Repeat
characteristics. Also, wait 1 to 10 minutes between
minute without errors translates to better than a 1 in 10 to the eighth error
rate. Ten minutes without errors translates to better than a 1 in 10 to the
ninth error rate.
10. If the test runs for 1 minute with an error count of 0, confirm that the 3-in-24
pattern error detector is operating properly by entering test ds1-loop
location inject-single-bit-error. This causes the 3-in-24 pattern
generator on the DS1 circuit pack to inject a single-bit error into the
transmit pattern. A subsequent list meas ds1 summary location
command displays the bit error count:
555-233-143
Indication
The loopback jack test is active.
If "y" displays, the DS1 circuit pack has synchronized
to the looped 3-in-24 pattern and is accumulating a
count of the bit errors detected in the pattern until the
test has ended.
If "n" displays, retry the test five times by ending the
test per
If the circuit pack never synchronizes, substantial bit
errors in the 3-in-24 pattern are likely. This could be
intermittent connections or a broken wire in a receive
or transmit pair in the CPE wiring.
If there are no wiring problems, the counter remains at 0.
A count that pegs at 65535 or continues to increment by
several hundred to several thousand on each list meas
command execution may indicate:
Intermittent or corroded connections
Severe crosstalk
Impedance imbalances between the two conductors
of the receive pair or the transmit pair. Wiring may
need replacement.
Note that "ESF error events" counter and the ESF
performance counter summaries ("errored seconds",
"bursty errored seconds", and so forth) will also increment.
These counters are not used with the loopback jack tests.
However, they will increment if errors are occurring.
Counters should be cleared following the test.
steps 5 through 8 as desired to observe bit error rate
If a count greater than 1 is displayed, replace the ICSU and retest.
If the problem continues, replace the DS1 circuit pack.
step 11 and re-starting the test per
steps 5 through
Issue 1 May 2002
step 4.
7. One
5-5