Toshiba TLCS-900/H1 Series Data Book page 91

PJ
bit Symbol PJ7
(004CH)
Read/W rite
After Reset
PJCR
bit Symbol
(004EH)
Read/W rite
After Reset
Function
PJFC
bit Symbol PJ7F
(004FH)
Read/W rite
After Reset
0: PORT
1: SDCKE
Function
PJDR
PJ7D
bit Symbol
(0093H)
Read/W rite
After reset
Function
Note 1: Read-Modify-W rite is prohibited for the registers PJCR and PJFC.
Port J register
7 6 5
PJ6 PJ5
Port J control register
7 6 5
PJ6C PJ5C
W
0
0: IN , 1: OUT
Port J function register
7 6 5
PJ6F PJ5F
0: PORT 0: PORT
1: 1:
NDCLE at NDALE at
<PJ6>=0, <PJ5>=0,
at
SDUUDQM SDULDQM
<PJ6>=1 <PJ5>=1
Port J Drive register
7 6 5
PJ6D PJ5D
Output/Input buffer drive-register for standby-mode
Figure3.5.28 Register for PortJ
92CH21 - 87
4 3
PJ4 PJ3
R/W
1
4 3
4 3
PJ4F PJ3F
W
0
0: PORT 0: PORT 0: PORT
1: 1: 1: /SDW E,
SDLUDQM SDLLDQM
at
4 3
PJ4D PJ3D
R/W
1
TMP92CH21
2 1 0
PJ2 PJ1 PJ0
2 1 0
2 1 0
PJ2F PJ1F PJ0F
0: PORT 0: PORT
1: /SDCAS, 1: /SDRAS,
/SRW R /SRLUB /SRLLB
2 1 0
PJ2D PJ1D PJ0D