Toshiba TLCS-900/H1 Series Data Book page 24

PLLCR0
bit symbol
(10E8H)
Read/Write
After reset
Function
(Note) Be carefull that logic of PLLCR0<LUPFG> is different from 900/L1's DFM.
PLLCR1
bit symbol PLLON
(10E9H)
Read/Write
After reset
Control on/off
Function
0: Off
1: On
PxDR
bit symbol Px7D
(xxxxH)
Read/Write
After reset
Function
( Purpose and How to use )
This register is used to set each pin-status at stand-by mode.
All ports have this format's register. ("x" means port-name.)
For each register, refer to 3.5 Function of Ports.
Before "HALT" instruction is executed, set each register according to
the expected pin-status. They will be effective after CPU executed "HALT" instruction.
It is not depend on stand-by mode(IDLE2,IDLE1 or STOP).
The truth table to control Output/Input-buffer is below.
7 6 5
FCSEL LUPFG
R/W R
0 0
Select fc-clock Lock-up timer
0 : f Status flag
OSCH
1 : f 0 : not end
PLL
1 : end
7 6 5
R/W
0
Figure 3.3.5 SFR for PLL
7 6 5
Px6D Px5D
Output/Input buffer drive-register for standby-mode
OE PxnD Output buffer
0 0 OFF
0 1 OFF
1 0 OFF
1 1 ON
Figure 3.3.6 SFR for drive register
92CH21 - 20
4 3 2
4 3 2
4 3 2
Px4D Px3D Px2D
R/W
1
Input buffer
(Note1) OE means an output enable signal
OFF
before stand-by mode.
ON
Basically, PxCR is used as OE.
OFF
(Note2) "n" in PxnD means bit-number of PORTx.
OFF
TMP92CH21
1 0
1 0
1 0
Px1D Px0D