Toshiba TLCS-900/H1 Series Data Book page 169

#
Transmission
In SCLK output mode 8-bit data and a synchronous clock are output on the TXD0 and
SCLK0 pins respectively each time the CPU writes the data to the Transmission Buffer.
When all data is output, INTES0 <ITX0C> will be set to generate the INTTX0 interrupt.
Timing to write
transmisison data
SCLK0 output
TXD0
ITX0C (INTTX0
interrupt request)
Figure 3.9.19 Transmitting Operation in I/O Interface Mode (SCLK0 Output Mode)
In SCLK Input Mode, 8-bit data is output on the TXD0 pin when the SCLK0 input
becomes active after the data has been written to the Transmission Buffer by the CPU.
When all data is output, INTES0 <ITX0C> will be set to generate INTTX0 interrupt.
SCLK0 input
(<SCLKS>=0: Rising edge mode)
SCLK0 input
(<SCLKS>=1: Falling edge mode)
TXD0
ITX0C (INTTX0
intterrupt reqest)
Figure 3.9.20 Transmitting Operation in I/O Interface Mode (SCLK0 Input Mode)
bit 0 bit 1
(Channel 0)
bit 0 bit 1
(channel 0)
92CH21 - 165
bit 6
bit 5 bit 6
TMP92CH21
bit 7
bit 7