Toshiba TLCS-900/H1 Series Data Book page 322

Start address register
H
(bit23-16)
LSARAH
A-area
(02A2H)
40H
LSARBH
B-area
(02A8H)
40H
LSARCH
C-area
(02AEH)
40H
NOTE) all register can RMW
LCDC0L/LCDC0H/LCDC1L/LCDC1H/LCDC2L/LCDC2H/LCDR0L/LCDR0H register
7
bit Symbol D7
Read/Write
After Reset
Function
address
3C0000H to
3CFFFFH
3D0000H to
3DFFFFH
3E0000H to
3EFFFFH
3F0000H to
3FFFFFH
Under Development
M L
(bit15-8) (bit7-1)
LSARAM LSARAL
(02A1H) (02A0H)
00H 00H
LSARBM LSARBL
(02A7H) (02A6H)
00H 00H
LSARCM LSARCL
(02ADH) (02ACH)
00H 00H
6 5 4
D6 D5 D4
Depend on External LCDD specification
Depend on External LCDD specification
Depend on External LCDD specification
function
Built-in RAM LCDD1
Built-in RAM LCDD2
Built-in RAM LCDD3
Built-in RAM LCDD4
92CH21-318
ROW number setting register
H L
(bit8) (bit7-0)
CMNAH CMNAL
(02A4H) (02A3H)
00H 00H
CMNBH CMNBL
(02AAH) (02A9H)
00H 00H
----- -----
3 2
D3 D2 D1
Chip enable
terminal
LCP0
LLP
LFR
LBCD
TMP92CH21
-----
-----
-----
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1 0
D0