Toshiba TLCS-900/H1 Series Data Book page 486

(11) UART/Serial Channel(2/2)
Symbol Name Address
Serial
Channel 1
SC1BUF 1208H
Buffer
Register
Serial
Channel 1
SC1CR 1209H
Control
Register
Serial
Channel 1
120AH
SC1MOD0
Mode 0
Register
Serial
Channel 1
Baud
BR1CR 120BH
Rate
Control
Register
Serial
Channel 1
BR1ADD 120CH
K setting
Register
Serial
Channel 1
120DH
SC1MOD1
Mode 1
Register
7 6
RB7 RB6
TB7 TB6
RB8 EVEN
R R/W
0 0
Receive Parity Parity
data 0:Odd 0:Disable
bit 8 1:Even 1:Enable
TB8 CTSE
0 0
Trans-mis 0:CTS 0:Receive
sion data Disable Disable
bit 8 1:CTS 1:Receive
Enable Enable
- BR1CK1
BR1ADDE
0 0
Fix to "0" (16-K)/16
00:φT0
divided
01:φT2
0:Disable
10:φT8
1:Enable
11:φT32
- - -
I2S1 FDPX1
R/W R/W
0 0 -
I/O interface
IDLE2
mode
0:Stop
1:Full duplex
1:Operate
0:Half duplex
92CH21 - 483
5 4
RB5 RB4 RB3
TB5 TB4 TB3
R(Receiving) / W(Transmission)
Undefined
PE OERR PERR
R (Clear 0 after reading)
0 0
1:Error
Overrun
RXE WU SM1
R/W
0 0
Wake up 00:I/O Interface
0:Disable Mode
1:Enable 01:7bit UART Mode
10:8bit UART Mode
11:9bit UART Mode
BR1CK0 BR1S3
R/W
0 0
Set the frequency divisor "N"
0 to F
BR1K3
-
- -
TMP92CH21
3 2 1
RB2 RB1
TB2 TB1
FERR SCLKS
0 0 0
0:SCLK1↑
1:SCLK1↓
SM0 SC1
0 0 0
00:TimerTOTRG
01:Baud Rate
Generator
10:Internal clock φ１
11:External clock
(SCLK1 Input)
BR1S2 BR1S1
0 0 0
BR1K2 BR1K1
R/W
0 0 0
Set the frequency divisor "K" (1 to F)
- -
0
RB0
TB0
IOC
R/W
0
0: Baud
Rate
Generator
1:SCLK1
Pin Input
SC0
0
BR1S0
0
BR1K0
0
-