Toshiba TLCS-900/H1 Series Data Book page 120

(4) Comparator (CP0)
The comparator compares the value in an up counter with the value set in a timer
register. If they match, the up counter is cleared to zero and an interrupt signal
(INTTA0 or INTTA1) is generated. If timer flip-flop inversion is enabled, the timer
flip-flop is inverted at the same time.
(5) Timer flip-flop (TA1FF)
The timer flip-flop (TA1FF) is a flip-flop inverted by the match detects signal (8-bit
comparator output) of each interval timer.
Whether inversion is enabled or disabled is determined by the setting of the bit
TA1FFCR<TAFF1IE> in the Timer flip-flops Control Register A Reset clears the value
of TA1FF to "0". Writing"01"or"10"to TA1FFCR<TAFF1C1, TAFF1C0>sets TA1FF to 0
or 1. Writing "00" to these bits inverts the value of TA1FF (this is known as software
inversion).
The TA1FF signal is output via the TA1OUT pin (which can also be used as PC0).
When this pin is used as the timer output, the timer flip-flop should be set beforehand
using the Port C Function Register PCCR, PCFC.
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