Toshiba TLCS-900/H1 Series Data Book page 137

32bit micro controller
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Address
Memory map
000000H
Internal I/O,RAM
COMMON-X
(2MB)
200000H
LOCAL-X
(2MB)
400000H
LOCAL-Y
(2MB)
600000H
COMMON-Y
(2MB)
800000H
LOCAL-Z
(4MB)
C00000H
COMMON-Z
(4MB)
FFFF00H
vector area
FFFFFFH
Figure 3.8.1.(1) –a Recommendation memory map for maximum specification (Logical)
/ND0CE-pin(128MB)
/ND1CE-pin(128MB)
/CS3-pin
128MB(2MB*64)
Bank 0
1
2
3
・・・ 15
Bank 0
1
2
3
・・・ 15
/SDCS or /C S1-pin
64MB(2MB*32)
Bank 0
1
2
3
・・・ 15
/CSZA-pin (note)
64MB(4MB*16)
: Internal Area
: Overlapped w ith COMMON-Area and disabled setting as LOCAL-area.
(note) /CSZ A is a chip-select for not only bank0 to 15 of
LOCAL-Z but also CO MMON-Z.
92CH21-133
・・・ ・・・
63
・・・
31
16 ・・・ 31 ・・・ 80 ・・・ 95
/CSZB-pin
・・・
/CSZF-pin
TMP92CH21
Memory controller
setting
CS0-area
32KB
CS3-area
4MB
CS1-area
4MB
CS2-area
8MB

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