Toshiba TLCS-900/H1 Series Data Book page 242

Stage change condition of Contorol・Read-transfer-type
＊Receive SETUPToken from host
・start setup・stage in USBC.
・Receving normally data in request and discern. And assert outside INT_SETUP interrupt.
・Change data・stage into the USBC.
＊Receive INToken from host
・CPU take back request from request-register when it react INT_SETUP interrupt.
・ Discern request and access SetupReceivedregister for inform USBC to recognized INT_SETUP
interrupt.
・According to Content device-request, monitor EP0bi of DATASETregister write data to FIFO.
・If USBC is set data of payload to FIFO or it was ordered CPU shortpacke-transfer-type t in
EOPregiste,set DATASET register.
・USBC react INtoken setting data in FIFO and it load to host.
・When CPU finish transaction, it write "0" to EP0bit of EOPregister.
・Change statusstage into the USBC.
＊Receive OUTtoken from hst.
・ Return ACK at OUTtoken and chabge IDLE condition into the USBC.
・Assert INT_STATUSinterrupt in outside.
These change condition is figure 5.4.
Setup
Data0 Ack
INT_SETUP
INT_ENDPOINT0
INT_STATUS
REQUEST FLAG
DATASET register
BRD
BWR
・bmRequestType register ・SetupReceived register ・EP0_FIFO（rest data） ・EOP register
・bRequest register ・EP0_FIFO（WR of payload）
・wValue register
・wIndex register
・wLength register
Figure 3.10.6
IN IN Data1
Nak
Figure the contorolflow in USBC（Contorol・read-transfer-type）
92CH21-238
Ack IN Data0 Ack
TMP92CH21
OUT Data1 Ack