Toshiba TLCS-900/H1 Series Data Book page 56

(4) Interrupt request flag clear register
The interrupt request flag is cleared by writing the appropriate micro DMA start vector, as
given in Table 3.4 (1), to the register INTCLR.
For example, to clear the interrupt flag INT0, perform the following register operation after
execution of the DI instruction.
INTCLR ← 0AH Clears interrupt request flag INT0.
Symbol NAME Address
Interrupt
INTCLR Clear
control
(5)Micro DMA start vector registers
These registers assign micro DMA processing to an sets which source corresponds to DMA.
The interrupt source whose micro DMA start vector value matches the vector set in one of these
registers is designated as the micro DMA start source.
When the micro DMA transfer counter value reaches zero, the micro DMA transfer end
interrupt corresponding to the channel is sent to the interrupt controller, the micro DMA start
vector register is cleared, and the micro DMA start source for the channel is cleared. Therefore,
in order for micro DMA processing to continue, the micro DMA start vector register must be set
again during processing of the micro DMA transfer end interrupt.
If the same vector is set in the micro DMA start vector registers of more than one channel,
the lowest numbered channel takes priority.
Accordingly, if the same vector is set in the micro DMA start vector registers for two different
channels, the interrupt generated on the lower-numbered channel is executed until micro DMA
transfer is complete. If the micro DMA start vector for this channel has not been set in the
channel's micro DMA start vector register again, micro DMA transfer for the higher-numbered
channel will be commenced. (This process is known as micro DMA chaining.)
7 6
- -
F8H
(no
0 0
RMW)
5 4
- -
W
0 0
Interrupt Vector
92CH21 - 52
TMP92CH21
3 2 1
- - -
0 0 0
0
-
0