Toshiba TLCS-900/H1 Series Data Book page 63

Table 3.5.2 I/O Registers and Specifications (2/3)
Port Pin name
Port 9
P90 to P97
P90 to P95
P90
P91
P92
P96
P97
Port A PA0 to PA7
PA3 to PA6
Port C PC0 to PC3
PC6 to PC7
PC0
PC1
PC2
PC3
PC6
PC7
Port F PF0 to PF2
PF0 to PF2,PF7
PF0
PF1
PF2
PF7
(note1) To use P92-pin as SCLK0-input or /CTS0-input, set "1" to PF<PF2>.
Specification
Input port
Output port
TXD0 output
I2SCKO output
TXD0 output(Open Drain)
RXD0 input
I2SDO output
SCLK0 output
I2SWS output
SCLK0,/CTS0 input (note1)
LGOE0 output
LGOE1 output
LGOE2 output
INT4 input
INT5 input
Input port
KI0 to KI7 input
LD8 to LD11 output
Input port
Output port
INT0 input
TA1OUT output
INT1 input
TA3OUT output
INT2 input
TB0OUT0 output
INT3 input
LDIV output
KO8 output (Open drain)
LCP1 output
/CSZF output
Input port
Output port
TXD0 output
TXD1 output
TXD0/TXD1 output (Open Drain)
RXD0 input
RXD1 input
SCLK0 output
SCLK1 output
SCLK0,/CTS0 input
SCLK1,/CTS1 input
SDCLK output
92CH21 - 59
I/O register
Pn PnCR PnFC
X 0 0
X 1 0
X 1 1
X 0 1
X 1 1
X 0 0
X 0 1
X 1 1
X 0 1
X 0 0
X 0 1
X 0 1
X 0 1
X None 1
X None 1
0
0
None
1
1 0
X
0 0
X 1 0
X
0 1
X
1 1
X 0 1
X 1 1
X
0 1
X
1 1
X 0 1
X 1 1
X 0 1
X 1 1
X
0 1
X
0 0
X
1 0
X 1 1
X 0 1
X 1/0 1
X
0 0
X 1 1
X 0 1
X 0
0
0
X None 1
TMP92CH21
X: Don't care
PnFC2
0
1
None
None
None
None
None
None
None
None
None
0
0
1
None