Toshiba TLCS-900/H1 Series Data Book page 21

3.3.1 Block diagram of system clock
SYSCR0<XTEN >
XT1
Low-Frequency
oscillator
XT2
SYSCR0<XEN >
X1
High-Frequency
oscillator
f
X2
OSCH
f (48MHz)= f
USB OSCH
f
SYS
f
io
φT0
fs
Selection example for f
(a) Needed USB with
(b) No-needed USB with
(c) No-needed USB without PLL
(Note1) To use USB, High-frequency Oscillator should be 9.0MHz.
SYSCR0<WUEF>
SYSCR2<WUPTM1 to 0>
Warming up timer
(High/Low frequency oscillator)
Lock up timer
(PLL)
PLLCR1<PLLON>,
PLLCR0<LUPFG>
fs
fc
= f × 4
f
PLL OSCH
selector
Clock Doubler
(PLL)
÷2
PLLCR0<FCSEL>
× 16/3
USBCR1<USB_CLKE>
TMRA0 to 3,TMRB0
prescaler
SIO0 to1
prescaler
RTC
MLD/ALM
Figure 3.3.2 Block Diagram of System clock
Table 3.3.1 Selection example for f
High-frequency
OSCH
Oscillation :
PLL
PLL max.10.0MHz
max.40.0MHz
92CH21 - 17
fc/2
fc/4
fc/8
SYSCR1<SYSCK>
fc/16
÷4 ÷8 ÷16
SYSCR1<GEAR2 to 0>
Clock gear
USB
Controller
CPU
RAM,ROM
Interrupt
controller
ADC
I/O ports
SDRAMC
System-
Clock :
f
OSCH
9.0MHz 18MHz
max.20MHz
max.20MHz
TMP92CH21
φT
φT0
f
FPH
÷4 ÷8
fs
f
÷2
SYS
÷2
f
IO
LCDC
Memory
Controller
NAND-Flash
Controller
I2S
TSI
SMROMC,
DSP I/F
OSCH
USB-
Clock :
f f
SYS USB
48MHz
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