Toshiba TLCS-900/H1 Series Data Book page 363

32bit micro controller
Hide thumbs Also See for TLCS-900/H1 Series:
Table of Contents

Advertisement

SDCMM
Bit symbol
(0253H)
Read/Write
After Reset
Function
(note2) <SCMM2-0> is cleared to "000" after a command is issued. But Self Refresh Entry-command is not
cleared and it can be cleared by only Self Refresh Exit-command.
(note3) Write command except Self Refresh Exit –command after checking whether they are "000".
SDRAM CoMMand register
7
6
5
Figure 3.16.1(1) SDRAMC control registers
92CH21-359
4
3
2
SCMM2
0
Issuing Command
(note2) (note3)
000: Not Issue
001: Initialize Sequence
100: Mode Register Set
101: Self Refresh Entry
110: Self Refresh Exit
other: Reserved
TMP92CH21
1
0
SCMM1
SCMM0
R/W
0
0
a. Precharge All Banks
b. 8 Times Auto Refresh
c. Mode Register Set

Advertisement

Table of Contents
loading

This manual is also suitable for:

Tmp92ch21fg

Table of Contents