Toshiba TLCS-900/H1 Series Data Book page 327

32bit micro controller
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Relation of Memory map image and Output data
8/16Gray (4 bpp: 8gray case, valid data is 3bit but data space need to 4bit)
Display memory image
Address 0
LSB
D0
0
1
2 3
4 5
6
1pixel
Address 4
LSB
D0
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
LD bus output sequence
4bitA type
LD0
3-0
to
19-16
LD1
7-4
to
23-20
LD2
11-8 to
27-24
LD3
15-12 to 31-28~
LD4
not use
LD5
not use
LD6
not use
LD7
not use
*8Gray data format is same to 16gray, 1pixel need to 4bit space. LSB bit is invalid data.
This mode don't support 8bitB type
Under Development
Address 1
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Address 5
4bitB type
~
LD0
~
LD1
~
LD2
LD3
LD4
LD5
LD6
LD7
Relation of Memory map image and Output data (2)
92CH21-323
Address 2
Address 6
19-16
to 3-0 ~
23-20
to 7-4 ~
27-24
to 11-8 ~
31-28 to 15-12 ~
not use
not use
not use
not use
    TMP92CH21
Address 3
    MSB
       
D31
Address 7
    MSB
       
D31
8bitA type
LD0
3-0
to 35-32 ~
LD1
7-4
to 39-36 ~
LD2
11-8 to 43-40 ~
LD3
15-12 to 47-44 ~
LD4
19-16
to 51-48 ~
LD5
23-20
to 55-52 ~
LD6
27-24
to 59-56 ~
LD7
31-28 to 63-60 ~

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