Toshiba TLCS-900/H1 Series Data Book page 85

3.5.12 Port F (PF0 to PF2,PF7)
Port F0 to F2 are 3-bit general-purpose I/O ports. Each bit can be set individually for input
or output. Resetting sets PF0 to PF2 to be an input ports. It also sets all bits of the output
latch register to "1". In addition to functioning as general-purpose I/O port pins, PF0 to
PF2 can also function as the I/O for serial channels 0 and 1. A pin can be enabled for I/O by
writing a "1" to the corresponding bit of the Port F Function Register (PFFC).
PortF7 is 1-bit general-purpose output port. In addition to functioning as general-purpose
output port , PF7 can also function as the SDCLK output. Resetting sets PF7 to be a
SDCLK output port.
(1)Port F0 (TXD0,TXD1), F1(RXD0,RXD1), F2(SCLK0,/CTS0,SCLK1,/CTS1)
PortF0 to F2 are general-purpose I/O port. They are also used either SIO0
or SIO1. Each pins are below.
Direction control
(On bit basis)
PFCR write
Function control
(On bit basis)
PFFC write
S
Output latch
PF write
TXD0
TXD1
PF Read
SIO-mode
(SIO0 module)
PF0 TXD0
(data output)
PF1 RXD0
(data input)
PF2 SCLK0
(clock input or
output)
Reset
A S
B
Selecter
C
S B
Selecter
A
Figure 3.5.21 Port F0
92CH21 - 81
UART,IrDA-mode SIO-mode
(SIO0 module) (SIO1 module)
TXD0 TXD1
(data output) (data output)
RXD0 RXD1
(data input) (data input)
/CTS0 SCLK1
(Clear to send) (clock input or
output)
Open-drain
set possible
PFFC2<PF0F2>
TMP92CH21
UART -mode
(SIO1 module)
TXD1
(data output)
RXD1
(data input)
/CTS1
(Clear to send)
PF0
(TXD0,TXD1)