Toshiba TLCS-900/H1 Series Data Book page 47

(2)Soft start function
The TMP92CH21 can initiate micro DMA either with an interrupt or by using the micro DMA
soft start function, in which micro DMA is initiated by a Write cycle which writes to the register
DMAR.
Writing 1 to any bit of the register DMAR causes micro DMA to be performed once. On
completion of the transfer, the bits of DMAR which support the end channel are automatically
cleared to 0.
When a burst is specified by the register DMAB, data is transferred continuously from the
initiation of micro DMA until the value in the micro DMA transfer counter is 0.
NAME Address
Symbol
109h
DMA
DMAR
(no
Request
RMW)
(3)Transfer control registers
The transfer source address and the transfer destination address are set in the following
registers. An instruction of the form LDC cr,r can be used to set these registers.
Channel 0
DMAS0
DMAD0
Channel 7
DMAS7
DMAD7
7 6
DREQ7 DREQ6
0 0
DMA Source address register 0
DMA Destination address register 0
DMAC0 DMA Counter register 0
DMAM0 DMA Mode register 0
DMA Source address register 7
DMA Destination address register 7
DMAC7 DMA Counter register 7
DMAM7 DMA Mode register 7
8 bits
16 bits
32 bits
92CH21 - 43
5 4 3
DREQ5 DREQ4 DREQ3
R/W
0 0 0
TMP92CH21
2 1 0
DREQ2 DREQ1 DREQ0
0 0 0