Topology 7: Thermda/Thermdc Routing Guidelines; Topology 8: Testhi And Reserved Pins - Intel Pentium 4 Design Manual

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5.4.1.10

Topology 7: THERMDA/THERMDC Routing Guidelines

The processor incorporates an on-die thermal diode. THERMDA (diode anode) and THERMDC
(diode cathode) pins on the processor can be connected to a thermal sensor located on the system
board to monitor the die temperature of the processor for thermal management/long term die
temperature change monitoring purpose. This thermal diode is separate from the Thermal
Monitor's thermal sensor and cannot be used to predict the behavior of the Thermal Monitor.
Routing guidelines for THERMDA/THERMDC:
Because the thermal diode is used to measure a very small voltage from the remote sensor, care
must be taken to minimize noise induced at the sensor inputs. Below are some guidelines:
• Remote sensor should be placed as close as possible to THERMDA/THERMDC pins. It can
be approximately 4 to 8 inches away as long as the worst noise sources such as clock
generators, data buses and address buses etc. are avoided.
• Route the THERMDA and THERMDC lines in parallel and close together with ground
guards enclosed.
• Leakage currents due to system board contamination must be considered. Error can be
introduced by the leakage current.
• Use wide tracks to reduce inductance and noise pickup that may be introduced by narrow
ones. A width of 10 mils and spacing of 10 mils is recommended.
5.4.1.11

Topology 8: TESTHI and RESERVED Pins

The TESTHI pins should be tied to the processor VCC using a matched resistor, where a matched
resistor has a resistance value within +- 20% of the impedance of the board transmission line
traces. For example, If the trace impedance is 50 Ω, then a value between 40 Ω and 60 Ω is
required.
The TESTHI pins may use individual pull-up resistors or be grouped together as detailed below. a
matched resistor should be used for each group:
• TESTHI[1:0]
• TESTHI[5:2]
• TESTHI[10:8]
• TESTHI[12:11]
Additionally, if the ITPCLKOUT[1:0] pins are not used then they may be connected individually
to VCC using matched resistors or grouped with TESTHI[5:2] with a single matched resistor. If
they are being used, individual termination with 1k ohm resistors is acceptable. Tying
ITPCLKOUT[1:0] directly to VCC or sharing a pull-up resistor to VCC will prevent use of debug
interposers. This implementation is strongly discouraged for system boards that do not implement
an onboard debug port.
As an alternative, group 2 ( TESTHI [5:2] ), and the ITPCLKOUT[1:0] pins may be tied directly
to the processor VCC. This has no impact on system functionality. TESTHI[0] and TESTHI[12]
may also be tied directly to processor VCC if resistor termination is a problem, but matched
resistor termination is recommended. In the case of the ITPCLKOUT[1:0], directly tying to VCC
is strongly discouraged for system boards that do not implement an onboard debug port.
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Intel Pentium 4 Processor / Intel
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850 Chipset Family Platform Design Guide
System Bus Routing
77