Gpio - Intel Pentium 4 Design Manual

In the 478-pin package / intel 850 chipset family platform
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Schematic Review Checklist
Checklist Items
APIC
15.7.7

GPIO

Checklist Items
GPIO Pins
262
Recommendations
Pentium 4 processor based systems:
• These processors do not have APIC
pins so all platforms using this
processor should both tie APICCLK
to ground and tie APICD[1:0] to
ground via a 1 k Ω –10 k Ω pull-down
resistor.
Non-Pentium® 4 processor based
systems:
If the APIC is used:
• 150 Ω pull-up resistors on
APICD[1:0]
• Connect APICCLK to CK133 with a
20–33 Ω series termination resistor.
If the APIC is not used on UP systems:
• The APICCLK can either be tied to
GND or connected to CK133, but not
left floating.
• Pull APICD[1:0] to GND through
10 k Ω pull-down resistors.
Recommendations
GPIO[0:7]:
• These pins are in the Main Power
Well. Pull-ups must use the VCC3_3
plane.
• Unused core well inputs must either
be pulled up to VCC3_3 or be pulled
down.
• GPIO[1:0] can be used as REQ[A:B]#.
• GPIO[1] can also used as PCI
REQ[5]#.
• These signals are 5 V tolerant
GPIO[8, 11:13]:
• These pins are in the resume power
well. Pull-ups must use the
VccSUS3_3 plane.
• Unused resume well inputs must be
pulled up to VccSUS3_3.
• These are the only GPIs that can be
used as ACPI compliant wake events.
• These signals are not 5 V tolerant
GPIO[16:23]:
• Fixed as output only. Can be left NC.
• In main power well.
• GPIO22 is open drain.
GPIO[24,25,27,28]:
• I/O pins. Can be left as No Connect.
• From resume power well.
®
®
Intel
Pentium
4 Processor / Intel
Reason/Impact
If the APIC is not used on UP
systems:
• Use pull downs for each APIC signal.
Do not share resistor to pull signals
up.
Reason/Impact
• Ensure ALL unconnected signals
are OUTPUTS ONLY!
• The GPIO signals listed in the
Recommendations column are the
only GPI signals in the resume well
with associated status bits in the
GPE1_STS register.
®
850 Chipset Family Platform Design Guide
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