System Management; Rtc - Intel Pentium 4 Design Manual

Schematic Review Checklist
15.7.11

System Management

Checklist Items
SMBDATA
SMBCLK
SMBALERT#/
GPIO[11]
SMLINK[1:0]
INTRUDER#
15.7.12

RTC

Checklist Items
VBIAS
RTCX1
RTCX2
SUSCLK
264
Recommendations
• Requires external pull-up resistors.
See SMBus Architecture and Design
Consideration section to determine the
appropriate power well to use to tie the
pull-up resistors. (Core well, suspend
well, or a combination.)
• See GPIO section if SMBALERT# not
implemented
• Requires external pull-up resistors.
See SMBus Architecture and Design
Consideration section to determine the
appropriate power well to use to tie the
pull-up resistors. (Core well, suspend
well, or a combination.)
• Pull signal to V
CC
needed
Recommendations
• The VBIAS pin of the ICH2 is
connected to a 0.047 µF capacitor.
See Section 9.8.7
• Connect a 32.768 kHz crystal oscillator
across these pins with a 10 M Ω
resistor and use 12 pF decoupling
capacitors at each signal.
• RTCX1 can optionally be driven by an
external oscillator instead of a crystal.
These signals are 1.8 V only, and
must not be driven by a 3.3 V source.
• Route to Test Point if SUSCLK is
unused
® ®
Intel Pentium 4 Processor / Intel
• Value of pull-ups resistors
determined by line load. Typical
value used is 8.2 k Ω .
• Value of pull-ups resistors
determined by line load. Typical
value used is 8.2 k Ω .
• Signal in V
RTC (V ) if not
BAT
• For noise immunity on VBIAS signal
• The ICH2 implements a new
internal oscillator circuit as
compared with the PIIX4 to reduce
power consumption. The external
circuitry shown in Section 9.7.1 will
be required to maintain the
accuracy of the RTC.
The circuitry is required since the
new RTC oscillator is sensitive to
step voltage changes in V
V
supply of more than 100 mV will
temporarily shut off the oscillator for
hundreds of milliseconds.
• To assist in RTC circuit debug
®
850 Chipset Family Platform Design Guide
Reason/Impact
RTC (V ) well
CC BAT
Reason/Impact
CCRTC
. A negative step on power
BIAS
R
and