Intel® Pentium® 4 Processor in the 478-Pin Package Processor Power Distribution Guidelines
11.1.4
FMB2 Decoupling Requirements
In order for the processor voltage regulator circuitry to meet the transient specifications of the
processor, proper bulk and high frequency decoupling is required. The decoupling requirements
for the processor power delivery in this case are described in Table 48 and Table 49.
Table 48. Four-Phase Decoupling Requirements
Capacitance
10 OSCONs*, 560 µF
38 1206 package, 10 µF
NOTES:
1. The ESR, ESL and ripple current values in this table are based on the values used in power delivery
simulation by Intel and they are not vendor specifications.
Table 49. Three-Phase Decoupling Requirements
Capacitance
9 OSCONs*, 560 µF
3 AI Electrolytic, 3300 µF
24 0805 package, 10 µF
14 1206 package, 10 µF
NOTES:
1. The ESR, ESL and ripple current values in this table are based on the values used in power delivery
simulation by Intel and they are not vendor specifications.
2. If only 1206's are used, 38 are needed.
The decoupling should be placed as close as possible to the processor power pins. Table 50 and
Table 51 and Figure 144 and Figure 145 describe and illustrate the recommended placement.
Table 50. Four-Phase Decoupling Locations
560 µF OSCONs*
1206 package, 10 µF
1206 package, 10 µF
1206 package, 10 µF
202
ESR
(Each)
9.28 mΩ, max
3.5 mΩ, typ
ESR
(Each)
9.28 mΩ, max
12 mΩ
3.5 mΩ, typ
Type
Number
10
13
12
13
®
®
Intel
Pentium
4 Processor / Intel
ESL
Ripple Current Rating
(Each)
6.4 nH, max
1.15 nH, typ
ESL
Ripple Current Rating
(Each)
6.4 nH, max
5 nH
1.15 nH, typ
Location
North side of the processor as close as possible to the keep-out
area for the retention mechanism
North side of the processor as close as possible to the
processor socket
Inside the processor socket cavity
South side of the processor as close as possible to the
processor socket
®
850 Chipset Family Platform Design Guide
Notes:
(Each)
4.080 A
1
1
Notes:
(Each)
4.080 A
1
1
1,2
1,2
R