Intel ® 82562 Et/Em Disable Guidelines; Figure 128. Intel ® 82562Et/Em Disable Circuit - Intel Pentium 4 Design Manual

I/O Controller Hub 2
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9.9.5 Intel
To disable the 82562ET/EM, the device must be isolated (disabled) prior to reset
(RSM_PWROK) asserting. Using a GPIO, such as GPO28 to be LAN_Enable (enabled high),
LAN will default to enabled on initial power-up and after an AC power loss. This circuit
(see Figure 128) will allow this behavior. BIOS by controlling the GPIO can disable the LAN
microcontroller.
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Figure 128. Intel 82562ET/EM Disable Circuit
GPIO_LAN_ ENABLE
There are 4 pins which are used to put the 82562ET/EM controller in different operating states:
Test_En, Isol_Tck, Isol_Ti, and Isol_Tex. The table below describes the operational/disable
features for this design.
Test_En
0
0
1
The four control signals shown in the above table should be configured as follows: Test_En should
be pulled-down thru a 100 Ω resistor. The remaining 3 control signals should each be connected
thru 100 Ω series resistors to the common node "82562ET/EM_Disable" of the disable circuit.
180
82562 ET/EM Disable Guidelines
RSM_PWROK
Out
In
10 kΩ
Isol_Tck Isol_Ti
0 0
1 1
1 1
® ®
Intel Pentium 4 Processor / Intel
V SUS3_3
CC
10 kΩ
Intel
Isol_Tex
0 Enabled
1 Disabled w/ Clock (low power)
1 Disabled w/out Clock (lowest power)
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850 Chipset Family Platform Design Guide
In
Q4301L
MMBT3906
Out
® 82562ET/EM_Disable
State
R