Signal Power/Ground Referencing Recommendations; Vddq And Typedet; Vref Generation - Intel Pentium 4 Design Manual

AGP Interface Routing
7.1.5

Signal Power/Ground Referencing Recommendations

It is strongly recommended that, at a minimum, the following critical signals be referenced to
ground from the MCH to an AGP connector utilizing a minimum number of vias on each net;
AD_STB0, AD_STB0#, AD_STB1, AD_STB1#, SB_STB, SB_STB#, G_GTRY#, G_IRDY#,
G_GNT# and ST[2:0].
In addition to the minimum signal set listed above, it is strongly recommended that half of all your
AGP signals be referenced to ground depending on board layout. An ideal design would have the
complete AGP interface signal field referenced to ground.
The recommendations above are not specific to any particular PCB stack-up, but are applicable to
all Intel chipset designs.
7.1.6

VDDQ and TYPEDET#

AGP specifies two separate power planes: VCC and VDDQ. VCC is the core power for the
graphics controller and is always 3.3 V. VDDQ is the interface voltage. The Intel 850 chipset only
supports an interface voltage of 1.5 V.
AGP 2.0 specification requires VCC and VDDQ to be tied to separate power planes and
implements a TYPEDET# (type detect) signal on the AGP connector that determines the interface
operating voltage (VDDQ). However, a motherboard based on the Intel 850 chipset only will only
support 1.5 V add-in card. The 3 V add-in cards are not supported. Therefore, TYPEDET#
detection on the motherboard is not required.
7.1.7 V Generation
REF
For 1.5 V add-in cards, both the graphics controller and MCH are required to generate VREF and
distribute it through the connector. Two signals have been defined on the 1.5 V connector to allow
V delivery:
REF
• VREFGC- VREF from the graphics controller to the chipset
• VREFCG- VREF from the chipset to the graphics controller
However, the usage of the source generated VREF at the MCH is not required per the AGP
Interface Specification, Revision 2.0. Given this and the fact that the MCH requires the presence
of V when an AGP add-in card is present and not present, the following circuit is recommended
REF
for V generation.
REF
The V
REF
around the V
Also, a 0.1 µF bypass capacitor should be placed within 150 mils of the MCH's GREF pins. The
two GREF pins on the MCH (GREF[0:1]) should be tied together before connecting to the bypass
capacitor. V
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divider network should be placed near the AGP interface. The minimum trace spacing
signal must be 25 mils, in order to reduce cross talk and maintain signal integrity.
REF
voltage must be 0.5 x VDDQ for 1.5 V operation.
REF
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Intel Pentium 4 Processor / Intel
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850 Chipset Family Platform Design Guide
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