R
12.7
CPU / CK00 Power Sequencing Requirement
To ensure that the correct processor system bus frequency is set, the CPU BSELx pins must be at
an operating state before the CK00 clock chip powers up. An example circuit is shown below.
Figure 181. CPU/CK00 Sequencing Circuit
VCCP
®
®
Intel
Pentium
4 Processor / Intel
47K 5%
MBT3904 DUAL
4.7K 5%
®
850 Chipset Family Platform Design Guide
Power Distribution Guidelines
VCC3_CLK
CLK_PWRDWN
CK00 Clock
Chip / DRCG
237