Cam Index Registers (Cam_Index[0-7]) - Texas Instruments TMS570LC4357 Technical Reference Manual

EPC Control Registers

12.4.10 CAM Index Registers (CAM_INDEX[0-7])

Figure 12-11. CAM Index Registers (CAM_INDEXn) (offset = 200h-21Ch)
31 28
Reserved
R-0
15 12
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; WP = Write in privileged mode only; -n = value after synchronous reset on system reset
Table 12-11. CAM Index Registers (CAM_INDEXn) Field Descriptions
Field Value
Reserved 0
index n
5h
Ah
All other values
5h
Ah
All other values
5h
All other values
Address Offset
200h
204h
208h
20Ch
210h
214h
218h
21Ch
496
Error Profiling Controller (EPC)
27
index n × 4 + 3
R/WP-5h
11
index n × 4 + 1
R/WP-5h
Description
Reserved. Reads return 0.
Entry valid tag for index n. See
entry in CAM is occupied or not. A write (privilege mode) to A0h to 11Ch in diagnostic mode or
functional mode does not only update the CAM content in corresponding index but also updates the
corresponding bit field in the entry valid tags registers CAM_INDEXn.
The index has a self correction mechanism as follows:
• Key active if valid key = 1010 or 1011 or 1000 or 1110 or 0010
• Key inactive if valid key = 0101 or 0100 or 0111 or 1101 or 0001
Read:
Entry is clear and available for future CAM usage.
Entry is occupied.
Reserved
Write in Diagnostic Mode:
Entry is cleared and available for future CAM usage.
Entry is set and occupied.
Reserved
Write in Functional Mode:
Entry is cleared and available for future CAM usage.
Reserved
Table 12-12. CAM Index Register n
CAM Index Register Bits 27-24
CAM Index Register 0
CAM Index Register 1
CAM Index Register 2 index 11
CAM Index Register 3 index 15
CAM Index Register 4 index 19
CAM Index Register 5 index 23
CAM Index Register 6 index 27
CAM Index Register 7 index 31
Copyright © 2018, Texas Instruments Incorporated
24 23
Reserved
R-0
8 7
Reserved
R-0
Table 12-12. This is the 4-bit key that determines whether the current
CAM Index Register Bits
Bits 19-16
index 3 index 2
index 7 index 6
index 10
index 14
index 18
index 22
index 26
index 30
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20 19
index n × 4 + 2
R/WP-5h
4 3
index n × 4
R/WP-5h
Bits 11-8 Bits 3-0
index 1 index 0
index 5 index 4
index 9 index 8
index 13 index 12
index 17 index 16
index 21 index 20
index 25 index 24
index 29 index 28
SPNU563A – March 2018
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