Texas Instruments TMS570LC4357 Technical Reference Manual page 442

STC1 Segment 0 (CPU) Test Coverage and Duration
Table 10-2. STC1 Segment 0 Test Coverage and Duration (continued)
Intervals
442
Self-Test Controller (STC) Module
Test Coverage (%)
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
Copyright © 2018, Texas Instruments Incorporated
Test Time (Cycles)
90.57
90.67
90.77
90.89
91.00
91.08
91.17
91.26
91.35
91.42
91.52
91.63
91.73
91.81
91.89
91.97
92.05
92.11
92.17
92.24
92.31
92.38
92.44
92.51
92.57
92.63
92.70
92.76
92.82
92.92
92.98
93.06
93.12
93.20
93.25
93.31
93.36
93.42
93.48
93.55
93.60
93.66
93.71
93.76
93.81
93.86
93.91
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71676
73305
74934
76563
78192
79821
81450
83079
84708
86337
87966
89595
91224
92853
94482
96111
97740
99369
100998
102627
104256
105885
107514
109143
110772
112401
114030
115659
117288
118917
120546
122175
123804
125433
127062
128691
130320
131949
133578
135207
136836
138465
140094
141723
143352
144981
146610
SPNU563A – March 2018
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