Texas Instruments TMS570LC4357 Technical Reference Manual page 857

Tms570lc43 series 16/32-bit risc flash microcontrollers
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22.2.1.9.2 Reading Conversion Results Directly from the Conversion Results' Memory
The conversion result memory is part of the device's memory map. The base address for the ADC1 result
memory is FF3E 0000h and for the ADC2 result memory is FF3A 0000h.
The application can identify the address ranges for each of the three memory regions for the three
conversion groups after performing the segmentation as described in
application to read the desired results from the three conversion groups. The formats of the conversion
results when reading from RAM directly are shown in
Figure 22-7. Format of Conversion Result Directly Read from ADC RAM, 12-bit ADC
31
30
15
14
ADC RAM
address
channel id [3–0]
Figure 22-8. Format of Conversion Result Directly Read from ADC RAM, 10-bit ADC
31
30
15
14
ADC RAM
address
Rsvd
Note that there is no EMPTY field to protect the application from reading data that has been previously
read.
Each group does have a separate register which holds the address in the group's result memory where
the ADC will write the next conversion result. These are the ADEVRAMWRADDR, ADG1RAMWRADDR,
and ADG2RAMWRADDR registers. The application can use this information to calculate how many valid
conversion results are available to be read.
Benefit of reading conversion results directly from ADC RAM:
The application does not have to read out conversion results sequentially as in the case of reading from a
FIFO. As a result, the application can selectively read the conversion results for any particular input
channel of interest without having to read other channels' conversion results.
SPNU563A – March 2018
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Figure 22-6. ADC Memory Mapping
ADC1
ADC2
0xFF3E0000
0xFF3A0000
0xFF3E0004
0xFF3A0004
0xFF3E0008
0xFF3A0008
0xFF3E01F8
0xFF3A01F8
0xFF3E00FC
0xFF3A00FC
29
28
27
26
25
13
12
11
10
29
28
27
26
25
13
12
11
10
channel id [4–0]
Copyright © 2018, Texas Instruments Incorporated
Conversion word 0
Conversion word 1
Conversion word 2
Conversion word 62
Conversion word 63
Section
Figure 22-7
and
Figure
24
23
22
21
9
8
7
6
5
Reserved
12-bit conversion result
24
23
22
21
9
8
7
6
5
Reserved
10-bit conversion result
Analog To Digital Converter (ADC) Module
Basic Operation
22.2.1.8. It is up to the
22-8.
20
19
18
17
16
4
3
2
1
channel id [4]
20
19
18
17
16
4
3
2
1
0
0
857

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