Texas Instruments TMS570LC4357 Technical Reference Manual page 929

Tms570lc43 series 16/32-bit risc flash microcontrollers
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22.3.41 ADC Group1 Results Emulation FIFO Register (ADG1EMUBUFFER)
ADC Group1 Results Emulation FIFO Register (ADG1EMUBUFFER) is shown in
Figure
22-69, described in
ADG1EMUBUFFER locations is different based on whether the ADC module is configured to be a 12-bit
or a 10-bit ADC module.
A read from this location also gives out one conversion result from the Group1 results' memory along with
the G1_EMPTY status bit and the optional channel id. However, this read will not affect any of the status
flags in the Group1 interrupt flag register or the Group1 status register. This register is useful for
debuggers.
Figure 22-68. 12-bit ADC Group1 Results Emulation FIFO Register (ADG1EMUBUFFER)
31
30
G1_EMPTY
R-1
15
12
Reserved
R-0
LEGEND: R = Read only; -n = value after reset; U = value after reset is unknown
Figure 22-69. 10-bit ADC Group1 Results Emulation FIFO Register (ADG1EMUBUFFER)
31
15
14
G1_EMPTY
G1_CHID
R-1
LEGEND: R = Read only; -n = value after reset; U = value after reset is unknown
Table 22-47. ADC Group1 Results Emulation FIFO Register (ADG1EMUBUFFER) Field Descriptions
Field
Value
Reserved
0
G1_EMPTY
0
1
G1_CHID
0
1h-1Fh
G1_DR
SPNU563A – March 2018
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Table
22-47. As shown, the format of the data read from the
Reserved
R-0
11
10
9
R-0
Description
Reads return 0. Writes have no effect.
Group1 FIFO Empty. This bit is applicable only when the "read from FIFO" mode is used for reading the
Group1 conversion results.
Any operation mode read:
The data in the G1_DR field of this buffer is valid.
The data in the G1_DR field of this buffer is not valid and there are no valid data in the Group1 results
memory.
Group1 Channel Id. These bits are also applicable only when the "read from FIFO" mode is used for
reading the Group1 conversion results.
Any operation mode read:
The conversion result in the G1_DR field of this buffer is from the ADC input channel 0, or the channel id
mode is disabled in the Group1 operating mode control register (ADG1MODECR).
The conversion result in the G1_DR field of this buffer is from the ADC input channel number denoted by
the G1_CHID field.
Group1 Digital Conversion Result.
These bits contain the digital result output from the Group 1 FIFO buffer. The result can be presented in an
8-bit, 10-bit, or 12-bit format for a 12-bit ADC module, or in an 8-bit or 10-bit format for a 10-bit ADC
module. The conversion result data is automatically shifted right by the appropriate number of bits when
using a reduced-size data format with the upper bits reading as zeros.
Copyright © 2018, Texas Instruments Incorporated
[offset = F4h]
21
G1_DR
R-U
[offset = F4h]
Reserved
R-0
G1_DR
R-U
Analog To Digital Converter (ADC) Module
ADC Registers
Figure 22-68
and
20
G1_CHID
R-0
16
0
16
0
929

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