Flash Control Registers
7.10.35 Flash Bank Configuration Register (FCFG_BANK)
Figure 7-45. Flash Bank Configuration Register (FCFG_BANK) (offset = 400h)
31
15
LEGEND: R = Read only; -n = value after reset
Table 7-47. Flash Bank Configuration Register (FCFG_BANK) Field Descriptions
Bit
Field
31-20
EE_BANK_WIDTH
19-16
Reserved
15-4
MAIN_BANK_WIDTH
3-0
Reserved
382
F021 Level 2 Flash Module Controller (L2FMC)
EE_BANK_WIDTH
R-48h
MAIN_BANK_WIDTH
R-90h
Value
Description
48h
Bank 7 width (72-bits wide)
This read-only value indicates the maximum number of bits that can be programmed in the
bank in one operation. The 72 bits includes 64 data bits and 8 ECC bits.
1
Writes have no effect.
90h
Width of main Flash banks (288-bits wide)
This read-only value indicates the maximum number of bits that can be programmed in the
bank in one operation. The 288 bits includes 256 data bits and 32 ECC bits.
2h
Writes have no effect.
Copyright © 2018, Texas Instruments Incorporated
www.ti.com
20
19
Reserved
R-1
4
3
Reserved
R-2h
SPNU563A – March 2018
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16
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