Texas Instruments TMS570LC4357 Technical Reference Manual page 612

RTI Control Registers
Table 17-26. RTI Set Interrupt Control Register (RTISETINTENA) Field Descriptions (continued)
Bit Field
8 SETDMA0
7-4 Reserved
3 SETINT3
2 SETINT2
1 SETINT1
0 SETINT0
612
Real-Time Interrupt (RTI) Module
Value Description
Set compare DMA request 0.
0 Read: DMA request is disabled.
Write: DMA request is unchanged.
1 Read or Write: DMA request is enabled.
0 Reads return 0. Writes have no effect.
Set compare interrupt 3.
0 Read: Interrupt is disabled.
Write: Corresponding bit is unchanged.
1 Read or Write: Interrupt is enabled.
Set compare interrupt 2.
0 Read: Interrupt is disabled.
Write: Corresponding bit is unchanged.
1 Read or Write: Interrupt is enabled.
Set compare interrupt 1.
0 Read: Interrupt is disabled.
Write: Corresponding bit is unchanged.
1 Read or Write: Interrupt is enabled.
Set compare interrupt 0.
0 Read: Interrupt is disabled.
Write: Corresponding bit is unchanged.
1 Read or Write: Interrupt is enabled.
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SPNU563A – March 2018
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