Texas Instruments TMS570LC4357 Technical Reference Manual page 902

ADC Registers
22.3.14 ADC Event Group Interrupt Flag Register (ADEVINTFLG)
ADC Event Group Interrupt Enable Control Register (ADEVINTENA) is shown in
described in Table
Figure 22-36. ADC Event Group Interrupt Flag Register (ADEVINTFLG) [offset = 34h]
31
7
Reserved
LEGEND: R/W = Read/Write; R = Read only; W1C = Write 1 to clear; -n = value after reset
Table 22-20. ADC Event Group Interrupt Flag Register (ADEVINTFLG) Field Descriptions
Bit Field
31-4 Reserved
3 EV_END
2 EV_MEM_EMPTY
1 EV_MEM_OVERRUN
0 EV_THR_INT_FLG
902
Analog To Digital Converter (ADC) Module
22-20.
4
R-0
Value Description
0 Reads return 0. Writes have no effect.
Event Group Conversion End. This bit will be set only if the Event Group conversions are
configured to be in the single-conversion mode.
Any operation mode read:
0 All the channels selected for conversion in the Event Group have not yet been converted.
1 All the channels selected for conversion in the Event Group have been converted. An Event
Group conversion end interrupt is generated, if enabled, when this bit gets set.
This bit can be cleared by any one of the following ways:
• By writing a 1 to this bit
• By writing a 1 to the Event Group status register (ADEVSR) bit 0 (EV_END)
• By reading one conversion result from the Event Group results' memory in the "read from
FIFO" mode
• By writing a new set of channels to the Event Group channel select register
Event Group Results Memory Empty. This is a read-only bit; writes have no effect. It is not a
source of an interrupt from the ADC module.
Any operation mode read:
0 The Event Group results memory is not empty.
1 The Event Group results memory is empty.
Event Group Memory Overrun. This is a read-only bit; writes have no effect.
Any operation mode read:
0 Event Group results memory has not overrun.
1 Event Group results memory has overrun.
Event Group Threshold Interrupt Flag.
Any operation mode read:
0 The number of conversions completed for the Event Group is smaller than the threshold
programmed in the Event Group interrupt threshold register.
1 The number of conversions completed for the Event Group is equal to or greater than the
threshold programmed in the Event Group interrupt threshold register.
This bit can be cleared by writing a 1; writing a 0 has no effect.
Copyright © 2018, Texas Instruments Incorporated
Reserved
R-0
3 2
EV_END EV_MEM_
EMPTY
R/W1C-0 R-1
www.ti.com
Figure 22-36 and
8
1 0
EV_MEM_ EV_THR_
OVERRUN INT_FLG
R-0 R/W1C-0
SPNU563A – March 2018
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