Juniper Core Router T Series Hardware Manual page 37

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The Switch Interface ASIC sends bandwidth requests through the switch fabric to the
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destination port. The Switch Interface ASIC also issues read requests to the Queuing
and Memory Interface ASIC to begin reading data cells out of memory.
The destination Switch Interface ASIC sends bandwidth grants through the switch
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fabric to the originating Switch Interface ASIC.
On receipt of each bandwidth grant, the originating Switch Interface ASIC sends a
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cell through the switch fabric to the destination Packet Forwarding Engine.
The destination Switch Interface ASIC receives cells from the switch fabric. It extracts
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the route lookup key from each cell, places it in a notification, and forwards the
notification to the T Series Internet Processor.
The T Series Internet Processor performs the route lookup, and forwards the
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notification to the Queuing and Memory Interface ASIC.
The Queuing and Memory Interface ASIC forwards the notification, including next-hop
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information, to the Switch Interface ASIC.
The Switch Interface ASIC sends read requests to the Queuing and Memory Interface
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ASIC to read the data cells out of memory, and passes the cells to the Layer 2/Layer
3 Packet Processing ASIC.
The Layer 2/Layer 3 Packet Processing ASIC reassembles the data cells into packets,
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adds Layer 2 encapsulation, and sends the packets to the outgoing PIC interface.
The outgoing PIC sends the packets out into the network.
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System Architecture Description for T Series Routers on page 5
Routing Engine Functions for T Series Routers on page 5
Chapter 1: System Overview and Architecture
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