Figure 2.1.1D Sample Allocation Of Multi-Byte Data In Memory; Figure 2.1.1E Execution Of Movw A, 080Ffffh - Fujitsu F2MC-16LX MB90580 Series Hardware Manual

Multi-byte data allocation in memory space
Figure 2.1.1d is a diagram of multi-byte data configuration in memory. The low-order eight bits of a data
item are stored at address n, then address n+1, address n+2, address n+3, etc.
H
01010101
11001100
11111111
00010100
Address n
L
Data is written to memory from the low-order addresses. Therefore, for a 32-bit data item, the low-order 16
bits are transferred before the high-order 16 bits.
If a reset signal is input immediately after the low-order bits are written, the high-order bits might not be
written.
Accessing multi-byte data
Fundamentally, accesses are made within a bank. For an instruction accessing a multi-byte data item,
address FFFFH is followed by address 0000H of the same bank. Figure 2.1.1e is an example of an
instruction accessing multi-byte data.
80FFFF
800000
MB90580 Series

Figure 2.1.1d Sample allocation of multi-byte data in memory

H
01
H
H
•
•
•
23
H H
L

Figure 2.1.1e Execution of MOVW A, 080FFFFH

MSB
01010101 11001100
AL before execution
AL after execution
2.1 CPU
LSB
11111111 00010100
?? ??
23 01
H H
Chapter 2: CPU 19