Mitsubishi Q00JCPU User Manual page 82

3
SEQUENCE PROGRAM CONFIGURATION AND
EXECUTION CONDITIONS
3
3.1 Sequence Program
- 17
3.1.3 Interrupt programs
(c) When multiple interrupt factors occur simultaneously in interrupt enable
status
The interrupt programs are executed in the order of descending preferences of
their interrupt pointers (I ) .(
The other interrupt programs have to wait until the processing of the interrupt
program being executed is completed.
Main routine
program
I50 interrupt
program
I100 interrupt
program
I150 interrupt
program
Diagram 3.14 When multiple interrupt factors occur simultaneously in interrupt enable status
When the same interrupt factor with that of the interrupt program currently being
executed occurs before completion of the processing, the operation will be as
described below.
1) Basic model QCPU
Interrupt factors of I0 to I15, I28 to I31 and I50 to I127 are stored only once.
2) High Performance model QCPU, Process CPU or Redundant CPU
Interrupt factors of I0 to I27 and I50 to I255 are stored only once.
For those of I32 to I41 and I49, factors occurred in the interrupt-disabled status
are discarded.
For those of I28 to 31 and in the fixed scan execution type program, all
interrupt factors occurred are stored and, as soon as interrupt is enabled, all of
interrupt programs corresponding to those factors are executed.
Note that factors generated with interrupts masked by the IMASK instruction
are all discarded.
(d) When instruction is being executed
The interrupt program may be executed during execution of the main routine
program instruction with the instruction execution being suspended.
When the same device is used for the main routine program and interrupt
program, device data may become inconsistent.
In this case, take the following measures to prevent device data inconsistency.
1) Transfer device data to another device
Do not specify the device, which is to be written into the interrupt program,
directly in the main routine program, but use it in another device by
transferring it with the transfer instruction.
Section 9.10)
Multiple interrupt factors
Interrupt
occur simultaneously.
enable (EI)
I50 I100
I150
Execution
Wait to be
processed
IRET
Execution
IRET
Wait to be
IRET
processed